2005
DOI: 10.4028/www.scientific.net/msf.483-485.969
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8.3 kV 4H-SiC PiN Diode on (000-1) C-Face with Small Forward Voltage Degradation

Abstract: The dependence of forward voltage degradation on crystal faces for 4H-SiC pin diodes has been investigated. The forward voltage degradation has been reduced by fabricating the diodes on the (000-1) C-face off-angled toward <11-20>. High-voltage 4H-SiC pin diodes on the (000-1) C-face with small forward voltage degradation have also been fabricated successfully. A high breakdown voltage of 4.6 kV and DVf of 0.04 V were achieved for a (000-1) C-face pin diode. A 8.3 kV blocking performance, which is the hi… Show more

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Cited by 19 publications
(17 citation statements)
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“…In Last, but not least, we have investigated the stability of the forward voltage drop after DC current stress. The V F increase by several volts after continued current stress is consensual explained due to stacking faults emanating from basal plane dislocations [1,2,5,6]. The mobilisation of these stacking faults is originated from the recombination energy produced under forward bias.…”
Section: Resultsmentioning
confidence: 93%
See 1 more Smart Citation
“…In Last, but not least, we have investigated the stability of the forward voltage drop after DC current stress. The V F increase by several volts after continued current stress is consensual explained due to stacking faults emanating from basal plane dislocations [1,2,5,6]. The mobilisation of these stacking faults is originated from the recombination energy produced under forward bias.…”
Section: Resultsmentioning
confidence: 93%
“…Especially, exploiting the unique ultra fast switching behaviour of SiC diodes will be the pushing key in establishing SiC technology with advanced components as high voltage Si-IGBTs even in high power management. Regardless of considerable improvements in the static IVcharacteristics [1,2], in the turn-off behaviour [3,4] and with respect to V F drifts after stress [2,5,6], the quality of wafers and epitaxial layers, quantified by defect densities, is still limiting the yield of such devices for larger active chip areas required for high current capabilities. Besides these technological challenges there does still exist a lack in device design since physical key parameters as e.g.…”
Section: Introductionmentioning
confidence: 99%
“…Low basal plane dislocation (BPD) densities are reported on epilayers grown on C-face 4H-SiC substrate [1,2]. As a result, high-voltage pin diodes fabricated on C-face show superior forward voltage stability compared with those on Si-face [3,4]. C-face has also shown to be more suitable for epitaxial growth on low off-cut angle or on-axis substrates [5,6].…”
Section: Introductionmentioning
confidence: 93%
“…A collection of data of reported 4H-SiC pn junction diodes [9][10][11][12][13] of typical design are studied. The breakdown voltage reductions of these diodes are 3000 or lower compared to theoretical prediction.…”
Section: Simulation Results and Discussionmentioning
confidence: 99%