6um Pitch High Density Cu-Cu Bonding for 3D IC Stacking

Xie, Ling; Wickramanayaka, Sunil; Chong, Ser Choong; Sekhar, Vasarla Nagendra; Ismeal, Daniel; Ye, Yong Liang

doi:10.1109/ectc.2016.141

Cited by 18 publications

(5 citation statements)

References 7 publications

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“…Since Cu formate is hydrophilic, the second study investigated the impacts of chip-storage conditions and time on the degradation of Cu-formate layer. Xie et al used Cu formate to protect surfaces from oxidation during chip handling in a production line for Cu–Cu bonding, and reported its stability for a few hours [ 16 ]. We investigated the lifetime of Cu formate by storing the chips for different durations in nitrogen and dry-air cabinets.…”

Section: Resultsmentioning

confidence: 99%

“…The temperature profile for the formic-acid-based reduction process is shown as the upper curve in Figure 4 b. This reduction process is already very efficient at lower temperatures, and the reaction took place as follows [ 16 ]:

where HCOOH is formic acid and Cu(HCOO) 2 is Cu formate. At ambient conditions, Cu formate is formed, being temporarily stable below 140 °C, and starts decomposing at about 140 °C [ 16 ].…”

Section: Methodsmentioning

confidence: 99%

“…This reduction process is already very efficient at lower temperatures, and the reaction took place as follows [ 16 ]:

where HCOOH is formic acid and Cu(HCOO) 2 is Cu formate. At ambient conditions, Cu formate is formed, being temporarily stable below 140 °C, and starts decomposing at about 140 °C [ 16 ]. At 200 °C, the reduction reaction is completed by desorbing CO 2 and H 2 , leaving the pure Cu metal.…”

Section: Methodsmentioning

confidence: 99%

“…The hybrid and thermo-compression techniques are two common Cu–Cu bonding approaches requiring a pollution- and oxide-free pad surface of sufficiently low roughness. Surface cleaning and protection using a self-assembled monolayer [ 13 ], non-conductive film [ 8 ], wet cleaning using sulfuric acid [ 14 ], acetic-acid swabbing [ 15 ], formic-acid (FA) vapors [ 16 ] and Ar/N 2 plasma [ 17 ] has been reported in the literature.…”

Section: Introductionmentioning

confidence: 99%

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Laser-Assisted Micro-Solder Bumping for Copper and Nickel–Gold Pad Finish

2022

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Flip-chip bonding is a key packaging technology to achieve the smallest form factor possible. Using copper as a direct under-bump metal and performing bonding under little force and at a low temperature eliminates the processing step for the deposition of a suitable wetting metal and offers an economical solution for electronic chip packaging. In this paper, various samples with copper and nickel–gold surface finishes are used to apply an in-house solder bumping, flip-chip bonding and reflow process to exhibit the bump-bond feasibility. Native oxides are reduced using process gases, and copper surface protection and solder wetting are achieved using copper formate. Lead-free 40 µm solder balls were bumped on 80 µm copper pads and 120 µm copper pillars to demonstrate a full intermetallic Cu–Cu bond as a base study for stacking applications. Using a low-force bonding technique, various chips with different dimensions were bonded at 0.5–16 MPa, followed by a reflow step at a maximum temperature of 270 ∘C. Then, 30 µm solder balls are utilized to bump the samples with NiAu and Cu bond pads at 50 µm pitch. A mean shear strength of 44 MPa was obtained for the 30 µm Cu samples. To the best of our knowledge, 30 µm solder bumping directly on the copper pads by producing copper formate is a novel research contribution.

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Section: Resultsmentioning

confidence: 99%

where HCOOH is formic acid and Cu(HCOO) 2 is Cu formate. At ambient conditions, Cu formate is formed, being temporarily stable below 140 °C, and starts decomposing at about 140 °C [ 16 ].…”

Section: Methodsmentioning

confidence: 99%

“…This reduction process is already very efficient at lower temperatures, and the reaction took place as follows [ 16 ]:

Section: Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Laser-Assisted Micro-Solder Bumping for Copper and Nickel–Gold Pad Finish

2022

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“…The elimination of solder by direct metal-metal bonding also provides opportunities for ultra-fine pitch interconnects. 6 µm interconnect pitch with 3 µm copper pillars were demonstrated in [21] using direct Cu-Cu TCB process.…”

Section: A Interconnect Technologymentioning

confidence: 99%

Latency, Bandwidth and Power Benefits of the SuperCHIPS Integration Scheme

Jangam

Pal

Bajwa

et al. 2017

2017 IEEE 67th Electronic Components and Technology Conference (ECTC)

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Abstract-In this paper, we describe the performance and power benefits of our Fine Pitch integration scheme on a Silicon Interconnect Fabric (Si IF). Here we propose a Simple Universal Parallel intERface (SuperCHIPS) protocol enabled by fine pitch dielet to interconnect fabric assembly. We show the dramatic improvements in bandwidth, latency, and power are achievable through our integration scheme where small dielets (1-25 mm 2 ) are attached to a rigid Silicon Interconnect Fabric (Si-IF) at fine interconnect pitch (2-10 μm) and short inter-die distance (50-500 μm) using solderless metal-to-metal thermal compression bonding (TCB). Our simulations show that links in the Si-IF with short wire-lengths (<500 μm) have excellent signal transfer characteristics with low channel loss (<-2 dB) and low cross-talk (<-15 dB). With fine interconnect pitches (<10 μm), our scheme can achieve >5-25x improvement in data bandwidth. This can improve system performance (>20x) when compared to PCB-style integration and may even approach single die SoC metrics in some cases. Furthermore our protocol is simple and non-proprietary. We show that this scheme enables heterogeneous system integration using a dielet based assembly method and provides significant reduction in design and validation cost.System-level analysis of heterogeneous integration scheme promises power benefits of more than 15% even for very small systems.

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