6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI

Bae

2017

Sensors

The bandwidth requirement of wireline communications has increased exponentially because of the ever-increasing demand for data centers and high-performance computing systems. However, it becomes difficult to satisfy the requirement with legacy electrical links which suffer from frequency-dependent losses due to skin effects, dielectric losses, channel reflections, and crosstalk, resulting in a severe bandwidth limitation. In order to overcome this challenge, it is necessary to introduce optical communication technology, which has been mainly used for long-reach communications, such as long-haul networks and metropolitan area networks, to the medium- and short-reach communication systems. However, there still remain important issues to be resolved to facilitate the adoption of the optical technologies. The most critical challenges are the energy efficiency and the cost competitiveness as compared to the legacy copper-based electrical communications. One possible solution is silicon photonics which has long been investigated by a number of research groups. Despite inherent incompatibility of silicon with the photonic world, silicon photonics is promising and is the only solution that can leverage the mature complementary metal-oxide-semiconductor (CMOS) technologies. Silicon photonics can be utilized in not only wireline communications but also countless sensor applications. This paper introduces a brief review of silicon photonics first and subsequently describes the history, overview, and categorization of the CMOS IC technology for high-speed photo-detection without enumerating the complex circuital expressions and terminologies.

Section: Silicon Photonics For High-speed Data Communicationsmentioning

confidence: 99%

Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection

Bae

2017

Sensors

IEICE Electron. Express

“…Therefore, high-output-swing transmitters with high energy efficiency and flexible-equalization ability are demanded. Recent works have demonstrated that source-series terminated (SST) PAM-4 drivers exhibit good linearity due to their voltage operation mode which does not involve current mismatch [21,22,23]. Unfortunately, the output impedance matching and tunable adjustment for the feed-forward equalizer (FFE) result in heavy self-drain loads, requesting an advanced process to support a high operation speed [24,25,26].…”

Section: Introductionmentioning

confidence: 99%

A high-output-swing 64-Gb/s PAM-4 transmitter with a 4-tap hybrid FFE in 28-nm CMOS

Xu,

Zheng,

Wang

et al. 2024

This article presents a high-output-swing 64-Gb/s four-level pulse amplitude modulation (PAM-4) transmitter, in which a 4-tap hybrid feed-forward equalizer (FFE) employing both fractionally-spaced preemphasis (FS-PE) and baud-spaced de-emphasis (BS-DE) is proposed. The PE technique enlarges the output swing by directly stacking pre-distortion pulses, and naturally consumes less power as it boosts only the desired symbols. The FS-based pre/post1 taps equalize the high-frequency loss, provide a wide compensation range beyond the Nyquist frequency, and realize a flexible equalization capability, while the BS-DE-based post2 tap compensates for the low-frequency channel loss. Fabricated in a 28-nm CMOS process, the 64-Gb/s transmitter obtains a differential output swing of 1.4 V ppd with an energy efficiency of 1.53 pJ/bit.

“…As the ADC resolution increases, the power consumption of the ADC and DSP increases, thereby increasing the power consumption of the entire link. When an FFE is implemented on the transmitter side [15]- [17], the eye-height is increased and the resolution of the ADC can be reduced; thus, the energy efficiency of the entire link can be improved. In this study, the transmitter focused on minimizing the power of the data path and maximizing power efficiency while removing the main ISI with a fixed first post tap coefficient.…”

Section: Introductionmentioning

confidence: 99%

A 16/32 Gb/s Dual-Mode NRZ/PAM4 Voltage-Mode Transmitter With 2-Tap FFE

et al. 2022

This paper describes a voltage-mode transmitter that supports both non-return-to-zero (NRZ) and four-level pulse amplitude modulation (PAM4) signal transmission. A 2-tap feed-forward equalizer (FFE) is implemented with PAM4 equalization logic consisting of three stages of logic gates and two separated voltage-mode drivers for multi-level generation. Equalization is performed in both the NRZ and PAM4 signal transmission modes. A prototype chip is fabricated using a 28-nm CMOS process. When transmitting 500-mVp-p signals using the proposed transmitter, 41.13 mW power is consumed from a 1-V power supply during the 32-Gb/s PAM4 transmission.INDEX TERMS Driver circuits, equalization, feed-forward equalizer (FFE), non-return-to-zero (NRZ), pulse amplitude modulation (PAM4), transmitters.