23.4: Invited Paper: Active‐Matrix Backplanes Produced by Roll‐to‐Roll Self‐Aligned Imprint Lithography (SAIL)

Abstract

Progress in the development of a fully roll‐to‐roll self‐aligned imprint process for producing active matrix backplanes with submicron aligned features on flexible substrates is reported. High performance transistors, crossovers and addressable active matrix arrays have been designed and fabricated using imprint lithography. Such a process has the potential of significantly reducing the costs of large area displays. The progress, current status and remaining issues of this new fabrication technology are presented.

High-resolution nondestructive patterning of isolated organic semiconductors

“…16,17 The technique presented here has no limitation to be adapted to both roll-to-roll processing and 3-D nanoimprint. Potentially sub-100 nm structures can be attained.…”

Development of rollable silicon thin‐film‐transistor backplanes utilizing a roll‐to‐roll continuous lamination process

“…Film-based thin-film-transistor (TFT) electronics have recently attracted much attention for display applications and for wearable electronics because of their advantages of thinness, lightness, and flexibility in comparison with conventional glass-based electronics. [1][2][3][4][5][6][7] They also offer an advantage from a mass-production standpoint: the potential to be produced with roll-to-roll processing techniques 8,9 that can be expected to lower overall manufacturing costs. A wide variety of transfer processes have been proposed, in which Si TFT arrays were fabricated on glass substrates and then transferred onto plastic substrates.…”

“…A fully roll-to-roll self-aligned imprint lithographic (SAIL) process has been reported for producing active-matrix backplanes with submicron aligned features on flexible substrates. 12 The SAIL process allows high cost and throughput limitations of many layer photolithographic/resist etch steps to be avoided. There has recently been considerable interest in oxide semiconductor materials such as InGaZnO 4 for use as the active layer in plastic-based TFTs because of the possibility of low-temperature fabrication (less than 150°C).…”

Patterning of Solution‐Processed, Indium‐Free Oxide TFTs by Selective Spray Pyrolysis

“…[ 13 ] These additional patterning steps limit throughput and contribute additional process complexity and cost. [14][15][16] Thus, lacking integration with highly scalable patterning methods, spray pyrolysis may have limited practical applications in large-area-electronics as it remains, in some sense, a cheaper substitute for sputtering with the fl exibility of solutionprocessing. Although shadow-mask-based patterning has been demonstrated for spray-deposited metal oxide transistors, [ 17 ] the resolution (≈500 µm) and performance ( µ max ≈ 0.18 cm 2 V −1 s −1 ) were limited compared to reports of inkjet printed thin fi lm transistors (TFTs) fabricated at similar temperatures.…”

“…Although spray pyrolysis offers the potential to deposit high‐quality TCOs at a low cost over large areas, it remains a blanket deposition technique that requires more expensive patterning techniques such as photolithography and etching for fabricating multilayer patterned structures such as thin‐film transistors . These additional patterning steps limit throughput and contribute additional process complexity and cost . Thus, lacking integration with highly scalable patterning methods, spray pyrolysis may have limited practical applications in large‐area‐electronics as it remains, in some sense, a cheaper substitute for sputtering with the flexibility of solution‐processing.…”