In this work, a nondestructive patterning method for organic semiconductors is demonstrated using nanoimprint lithography (NIL) and polymer sacrificial template. After patterning amorphous fluorinated polymer (Teflon-AF) structures by NIL, poly(3-hexylthiophene) (P3HT) thin film is spin-coated on the Teflon-AF template. The sacrificial template is then removed by a fluorinated solvent, leaving patterned P3HT structures on the substrate. P3HT lines and squares of various sizes (0.35 lm to tens of microns) are obtained by this method. This technique is also extended to fabricate passive-matrix organic light-emitting diode arrays for flat-panel display applications. By avoiding oxygen RIE on organic semiconductor, this patterning technique is nondestructive to organic semiconductors. Moreover, this method is capable of making high-resolution (deep submicron) organic semiconductor patterns to potentially enable nanoscale organic electronic devices with high performance or organic integrated systems with high integration density.

We propose the design and fabrication of a coplanar electrode structure for an organic metal–semiconductor field-effect transistor (OMESFET), with the gate electrode self-aligned between the source and drain electrodes. We first used nanoimprint lithography (NIL) to define a channel area of the device on a patterned metal, and then used chemical wet etching to create the source and drain electrodes by removing the metal in the channel area. After the wet etching, the gate electrode was deposited in the channel area. The organic semiconductor was then deposited to cover the patterned electrodes. The rectifying response and the device characteristics prove that the self-aligned device is a functional OMESFET. In this experiment, we also demonstrated that the self-aligned OMESFET has lower driving voltages and smaller subthreshold swing (SS) than that of a conventional organic metal–insulator–semiconductor field-effect transistor (OMISFET). Compared with the most common OMESFET structure, this self-aligned coplanar structure effectively eliminates the overlapping area between the gate and source/drain electrodes commonly seen in currently reported OMESFETs, which means that this self-aligned device structure reduces the parasitic capacitance, theoretically allowing the transistor to have a higher cutoff frequency. These features render our proposed OMESFET devices more favorable for low-power and high-frequency organic circuit applications.

This work is to demonstrate a low cost and time-conserving technique to create nano-trenches by transferring nano-scale polymeric sidewalls into substrate. The polymeric sidewall is a vertically spreading layer deposited by spin-coating a polymer solution on a vertical template. By varying processing parameters such as the solution concentration or the spin-coating speed, the dimension of the sidewall can be changed, which, after pattern transfer, also changes the nano-trench dimension. In this work, high-resolution trenches of about 15 nm have been achieved after transferring straight line sidewalls into substrate. Other than straight line sidewall patterns, this method also fabricates ring-shaped patterns including circles, squares, and concentric squares. With various shapes of sidewall patterns, this technique has a potential to implement other practical applications such as fabricating high-resolution nanoimprint molds of 15 nm.