Printed electronics promises the realization of low-cost electronic systems on flexible substrates over large areas. In order to achieve this, high quality patterns need to be printed at high speeds. Gravure printing is a particularly promising technique that is both scalable and offers micron-scale resolution. Here, we review the tremendous progress that has recently been made to push gravure printing beyond its traditional limitations in the graphic arts. Rolls with far greater precision than traditional rolls and with sub-5 μm resolution can be fabricated utilizing techniques leveraging the precision of silicon microfabrication. Physical understanding of the sub-processes that constitute the gravure process is required to fully utilize the potential of gravure. We review the state-of-the-art of this understanding both for single cells and patterns of multiple cells to print high-resolution features as well as highlyuniform layers. Finally, we review recent progress on gravure printed transistors as an important technology driver. Fully high-speed printed transistors with sub-5 μm channel length and sub-5 V operation can be printed with gravure.

This roadmap includes the perspectives and visions of leading researchers in the key areas of flexible and printable electronics. The covered topics are broadly organized by the device technologies (sections 1-9), fabrication techniques (sections 10-12), and design and modeling

The integration of fully printed transistors on low cost paper substrates compatible with roll-to-roll processes is demonstrated here. Printed electronics promises to enable a range of technologies on paper including printed sensors, RF tags, and displays. However, progress has been slow due to the paper roughness and ink absorption. This is solved here by employing gravure printing to print local smoothing pads that also act as an absorption barrier. This innovative local smoothing process retains desirable paper properties such as foldability, breathability, and biodegradability outside of electronically active areas. Atomic force microscopy measurements show signifi cant improvements in roughness. The polymer ink and printing parameters are optimized to minimize ink absorption and printing artifacts when printing the smoothing layer. Organic thin fi lm transistors (OTFT) are fabricated on top of this locally smoothed paper. OTFTs exhibit performance on par with previously reported printed transistors on plastic utilizing the same materials system (pBTTT semiconductor, poly-4-vinylphenol dielectric). OTFTs deliver saturation mobility approaching 0.1 cm 2 V -1 s -1 and on-off-ratio of 3.2 × 10 4 . This attests to the quality of the local smoothing, and points to a promising path for realizing electronics on paper.

substrates would be cheap, portable, large volume, disposable systems such as radio-frequency identifi cation (RFID) tags, fl exible displays or sensors on food packaging. [4][5][6][7] Many such systems would require printed organic thin-fi lm transistors (OTFTs) for tasks such as signal amplifi cation, pixel selection in an active matrix, or simple logic. In order to fully enable such applications, printed transistors need to fulfi ll a number of requirements. These OTFTs need to deliver relatively high performance; performance can be improved by exploiting innovations in both materials and printing resolution. Furthermore, the supply voltage will likely be limited. In many such systems power will be supplied by a printed battery or a printed solar cell, placing constraints on the available voltage. Additionally, in order to fully benefi t from the promise of highthroughput, low-cost fabrication, all transistor layers need to be printed at high printing speeds. Finally, device-to-device variation needs to be small to realize any realistic circuit.In the past, many reports have demonstrated tremendous progress in one or more of these areas. Many reports have shown that novel organic semiconductor materials can boost performance. [8][9][10] Performance can also be enhanced by using careful crystallization techniques. [11][12][13][14] It has been shown that thin gate dielectrics can be used to reduce the operating voltage signifi cantly. [15][16][17] However, much of this work was performed with idealized systems that are not compatible with high volume printing, for example, using silicon substrates, evaporated contacts, or spin coating. In addition, crystallized semiconductors typically exhibit variability due to the random placement of grain boundaries. There has been work to improve uniformity and produce fully solution-processed [ 18 ] or printed devices. [ 19 ] However, these works did not employ highspeed printing techniques that can run at speeds on the order of meters per second and the feature size was limited to tens of micrometers. Recently, transistors have been fabricated with highly scaled feature sizes below 5 µm that have been printed using reverse offset [ 20 ] and gravure printing; [ 21 ] however, some of the layers were still fabricated with lower speed techniques.Here, we print OTFTs where every layer is printed by gravure (see Figure 1 a for an illustration of the gravure process) with a high print speed of 1 m s -1 including highly scaled source and Printed transistors will be a key component in low-cost, large area, fl exible printed systems such as fl exible displays, sensor networks, or radio-frequency identifi cation (RFID) tags. In any such applications, these printed organic thin-fi lm transistors (OTFTs) will have to operate at low voltages, exhibit good uniformity, and deliver relatively high performance by using scaled source and drain electrodes. In addition, devices need to be printed at high speeds to fully harness the potential of low-cost fabrication that printed electronics pro...