2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers 2015
DOI: 10.1109/isscc.2015.7062919
|View full text |Cite
|
Sign up to set email alerts
|

2.10 A 60GHz 28nm UTBB FD-SOI CMOS reconfigurable power amplifier with 21% PAE, 18.2dBm P<inf>1dB</inf> and 74mW P<inf>DC</inf>

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1
1

Citation Types

0
12
0

Year Published

2017
2017
2020
2020

Publication Types

Select...
8
1

Relationship

1
8

Authors

Journals

citations
Cited by 26 publications
(14 citation statements)
references
References 3 publications
0
12
0
Order By: Relevance
“…In particular, [136] reports a 16way T-line power combiner on 3-stage single-ended PA cores in 90 nm SiGe which achieves 27.3 dBm saturated power, 22.3 dBm power at 1 dB compression and 12.4% PAE with a 1.8 V supply. There are also explorations on the distributed active transformer (DAT) for series power combining that is especially useful for PAs using low-voltage silicon devices [138], [139]. However, using transformer magnetic coupling for DAT combiners fundamentally needs "circular-shape" output arrangement and results in substantially complicated input signal distribution, low area-efficiency, and limited scalability on the number of combining paths.…”
Section: Dbm Saturated Power and 25 Db Gain At 60 Ghzmentioning
confidence: 99%
“…In particular, [136] reports a 16way T-line power combiner on 3-stage single-ended PA cores in 90 nm SiGe which achieves 27.3 dBm saturated power, 22.3 dBm power at 1 dB compression and 12.4% PAE with a 1.8 V supply. There are also explorations on the distributed active transformer (DAT) for series power combining that is especially useful for PAs using low-voltage silicon devices [138], [139]. However, using transformer magnetic coupling for DAT combiners fundamentally needs "circular-shape" output arrangement and results in substantially complicated input signal distribution, low area-efficiency, and limited scalability on the number of combining paths.…”
Section: Dbm Saturated Power and 25 Db Gain At 60 Ghzmentioning
confidence: 99%
“…One realization in 28 nm CMOS is the dual-mode PA presented in [11]. It achieves the highest reported gain when operating in high gain mode and the highest OCP 1dB in the high linearity mode.…”
Section: Comparison With the State-of-the-artmentioning
confidence: 99%
“…For sub-65 nm CMOS technologies, fewer 60-GHz power amplifiers have been published yet. For the 28-nm node, specifically the circuits in [10] and [11] have been reported to this point. Whilst the limitation on the supported voltage levels over the transistors become more stringent, the technological evolution has allowed significant improvement on the frequency performance of the devices, allowing higher gain levels at mm-waves.…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, when N ANT equals 16, the maximum P PA,out is limited to 19 dBm, and the maximum P PA,out will increase to 25 dBm if N ANT is set to 8. The specification of 19 dBm output power is less challenging and more implementable according to the current state-of-the-art mmWave PA designs [48], [49].…”
Section: B Uplink Budget and Data Throughput Analysismentioning
confidence: 99%