1T Memory Cell Based on PVDF-TrFE Field Effect Transistor

Abstract

Interest in PVDF-TrFE copolymers as ferroelectric material for Memory application is driven by the prospect of having low cost, low operating voltage and fully organic device. Some previous studies reported FET designs using copolymers [refs 1,2] but none of these structures were fully integrated on silicon wafers and using a MOSFET fabrication process. We present for the first time the integration of a PVDF-TrFE (70%-30%) layer into a standard n-MOS transistor through a quasi-standard semiconductor technology. This allows us to achieve a Non Volatile Memory cell and at the same time to compact capacitor-transistor ferroelectric cell into a one-transistor memory cell.

Design points of ferroelectric field-effect transistors for memory and logic applications as investigated by metal-ferroelectric-metal–insulator–semiconductor gate stack structures using Hf0.5Zr0.5O2 films

“…Many experimental studies on the development of the NC-FET with an SS of <60 mV/decade have been reported. [38][39][40][41][42][43][44][45][46][47][48] Unfortunately, their results do not satisfy the requirements of hysteresis-free and low-operation voltage. Nevertheless, the physics of the NC-FET is still a topic of debate, as discussed in many studies.…”