128 × 128 silicon photonic MEMS switch package using glass interposer and pitch reducing fibre array

Yuan, Hwang How; Morrissey, Padraic E.; Lee, Jun Su; O’Brien, Peter; Henriksson, Johannes; Wu, Ming C.; Seok, Tae Joon

doi:10.1109/eptc.2017.8277436

Cited by 14 publications

(9 citation statements)

References 7 publications

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“…with 136 optical channels [126]. In order to reduce the FA footprint on the photonic chip and improve the form factor of the packaged device, it is possible to use total internal reflection from a suitably polished fiber surface to direct the beam into a GC at the required angle.…”

Section: Packaging Techniquesmentioning

confidence: 99%

Coupling strategies for silicon photonics integrated chips [Invited]

Marchetti¹,

Lacava²,

Carroll³

et al. 2019

Photon. Res.

381

206

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Over the last 20 years, silicon photonics has revolutionized the field of integrated optics, providing a novel and powerful platform to build mass-producible optical circuits. One of the most attractive aspects of silicon photonics is its ability to provide extremely small optical components, whose typical dimensions are an order of magnitude smaller than those of optical fiber devices. This dimension difference makes the design of fiberto-chip interfaces challenging and, over the years, has stimulated considerable technical and research efforts in the field. Fiber-to-silicon photonic chip interfaces can be broadly divided into two principle categories: in-plane and out-of-plane couplers. Devices falling into the first category typically offer relatively high coupling efficiency, broad coupling bandwidth (in wavelength), and low polarization dependence but require relatively complex fabrication and assembly procedures that are not directly compatible with wafer-scale testing. Conversely, out-of-plane coupling devices offer lower efficiency, narrower bandwidth, and are usually polarization dependent. However, they are often more compatible with high-volume fabrication and packaging processes and allow for on-wafer access to any part of the optical circuit. In this paper, we review the current state-of-the-art of optical couplers for photonic integrated circuits, aiming to give to the reader a comprehensive and broad view of the field, identifying advantages and disadvantages of each solution. As fiber-to-chip couplers are inherently related to packaging technologies and the co-design of optical packages has become essential, we also review the main solutions currently used to package and assemble optical fibers with silicon-photonic integrated circuits.

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Section: Packaging Techniquesmentioning

confidence: 99%

Coupling strategies for silicon photonics integrated chips [Invited]

Marchetti¹,

Lacava²,

Carroll³

et al. 2019

Photon. Res.

381

206

View full text Add to dashboard Cite

show abstract

“…Compared to lithographically patterned fused silica interposer solutions (e.g. [8]), we end up with a higher insertion loss (2.5-2.8 dB versus 0.6-1.2 dB), but our solution allows for passive alignment of optical fibers in the monolithically integrated V-grooves. Fig.…”

Section: Mirrormentioning

confidence: 99%

“…Moreover, the achievable channel pitch is limited to 127 or 250 µm, dictated by the optical fiber outer cladding diameter. To circumvent these limitations, lithographically patterned fused silica interposers have been proposed, integrating fanout waveguides between a dense array of on-chip silicon waveguides and a fiber array [8].…”

Section: Introductionmentioning

confidence: 99%

Laser Written Glass Interposer for Fiber Coupling to Silicon Photonic Integrated Circuits

et al. 2021

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Recent advancements in photonic-electronic integration push towards denser multichannel fiber to silicon photonic chip coupling solutions. However, current packaging schemes based on suitably polished fiber arrays do not provide sufficient scalability. Alternatively, lithographically-patterned fused silica glass interposers have been proposed, allowing for the integration of fanout waveguides between a dense array of on-chip silicon waveguides and a cleaved fiber ribbon. In this paper, we propose the use of femtosecond laser inscription for the fabrication of the fused silica glass interposer, allowing for a monolithic integration of waveguides and V-grooves for fiber alignment. The waveguides obtained by Femtosecond Laser Direct Writing (FLDW) have a propagation loss of 0.88 dB/cm at 1550 nm. The mode-field diameter is 12.8 ± 0.4 µm, allowing for a coupling loss of 1.24 ± 0.32 dB when coupling to a standard single mode optical fiber, passively aligned to the fused silica waveguide by insertion in a V-groove created by Femtosecond Laser Irradiation followed by Chemical Etching (FLICE). The average surface roughness of the etched waveguide facet is 160 ± 5 nm. Scattering loss when coupling to fiber is reduced by use of an index-matching adhesive for fiber fixation. A polished out-of-plane coupling mirror at an angle of 41.5 • injects the light into standard grating couplers, providing a quasi-planar fiber-to-chip package. The excess loss of the proposed solution is limited to 2 dB per interface, including mirror, waveguide and fiber coupling losses. Using the currently optimized laser parameters, the time required to expose a single V-groove/waveguide combination is around one minute.

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“…Currently, most fully programmable and scalable switching fabrics in large-scale silicon photonic switches are constructed primarily from multistage structures by manipulating the phase-shifting technique, for instance, Mach-Zehnder Interferometers (MZIs) [15][16][17], multi-mode interference (MMI) couplers [18,19], and microring resonators (MRR) [20]. N×N optical switch fabrics are built up by interconnecting multiple stages of elementary switch cells in an available switching topology via passive waveguide elements or Benes types [21][22][23][24][25][26]. However, current silicon photonic switches due to having the ability to support a large number of input/output ports (up to 128 × 128) are being still limited in the bidirectional switching ability without supporting higher dimensions.…”

Section: Introductionmentioning

confidence: 99%

“…A further novelty of our work is the design of optical cross-connect elements for delivering the optical signal from an arbitrary input port to a random output port without interfering and congesting with other input/output channels. These crossconnect elements are essential to attain the non-blocking multidimensional switching function, thus making the proposed silicon switches more outperformed than that of existing bidirectional photonic switches [21][22][23][24][25][26]. To the best of our knowledge, optical cross-connect components in silicon photonics have not been realized before.…”

Section: Introductionmentioning

confidence: 99%

Self-Controlling Photonic-on-Chip Networks With Deep Reinforcement Learning

Truong

Nguyễn

et al. 2021

Preprint

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We present a novel photonic chip design for high bandwidth four-degree optical switches that support high-dimensional switching mechanisms with low insertion loss and low crosstalk in a low power consumption level and a short switching time. Such four-degree photonic chips can be used to build an integrated full-grid Photonic-on-Chip Network (PCN). With four distinct input/output directions, the proposed photonic chips are superior compared to the current bidirectional photonic switches, where a conventionally sizable PCN can only be constructed as a linear chain of bidirectional chips. Our four-directional photonic chips are more flexible and scalable for the design of modern optical switches, enabling the construction of multi-dimensional photonic chip networks that are widely applied for intra-chip communication networks and photonic data centers. More noticeably, our photonic networks can be self-controlling with our proposed Multi-Sample Discovery model, a deep reinforcement learning model based on Proximal Policy Optimization. On a PCN, we can optimize many criteria such as transmission loss, power consumption, and routing time, while preserving performance and scaling up the network with dynamic changes. Experiments on simulated data demonstrate the effectiveness and scalability of the proposed architectural design and optimization algorithm. Perceivable insights make the constructed architecture become the self-controlling photonic-on-chip networks.

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128 × 128 silicon photonic MEMS switch package using glass interposer and pitch reducing fibre array

Cited by 14 publications

References 7 publications

Coupling strategies for silicon photonics integrated chips [Invited]

Coupling strategies for silicon photonics integrated chips [Invited]

Laser Written Glass Interposer for Fiber Coupling to Silicon Photonic Integrated Circuits

Self-Controlling Photonic-on-Chip Networks With Deep Reinforcement Learning

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