2019
DOI: 10.1364/ol.44.001821
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10  Gb/s optical random access memory (RAM) cell

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Cited by 36 publications
(19 citation statements)
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“…71 However, in past decades, a growing performance gap between processor performance and memory bandwidth, i.e., the "memory wall" problem, has hindered high-performance computation. 73 Electronic processors are also suffering from the tremendous energy consumption of digital transceiver circuits during massive data I/O connections. Increasing the memory-processor bandwidth and energy efficiency in interconnections is an effective way to diminish the data movement problem.…”
Section: Optical Interconnections In Computation Hardwarementioning
confidence: 99%
“…71 However, in past decades, a growing performance gap between processor performance and memory bandwidth, i.e., the "memory wall" problem, has hindered high-performance computation. 73 Electronic processors are also suffering from the tremendous energy consumption of digital transceiver circuits during massive data I/O connections. Increasing the memory-processor bandwidth and energy efficiency in interconnections is an effective way to diminish the data movement problem.…”
Section: Optical Interconnections In Computation Hardwarementioning
confidence: 99%
“…When a control signal is injected into the device, it leads both SOAs performing close to their gain transparency region, as such the SOAs' carrier fluctuation and intensity modulation are greatly reduced, supporting clipping properties and strongly power equalized output pulses. On the other hand, when SOAs are operated in a symmetrically biased condition, as in simple WC or push-pull schemes [33], they are generating amplitude fluctuations, jitter and transient phenomena as described in more details in [34].…”
Section: Experimental Setup and Principle Of Operationmentioning
confidence: 99%
“…condition, as in simple WC or push-pull schemes [33], they are generating amplitude fluctuations, jitter and transient phenomena as described in more details in [34].…”
Section: Experimental Setup and Principle Of Operationmentioning
confidence: 99%
“…However, high-speed, energy-efficient and compact photonic storage with true static random-access characteristics is still demanding to form the ultimate underlying memory sub-system for general-purpose optical computing. Various methods have been investigated for all-optical static random access memory (SRAM) cells, including semiconductor optical amplifier-Mach-Zehnder interferometer (SOA-MZI) configurations [11][12][13][14] , SOA-based ring lasers 15 , III-V photonic crystal cavities 16 and optomechanical cavities 17 . SOA-MZI based optical SRAM bit cell reported in 14 exhibit a speed of 10 Gbps, however, these devices are not compatible for large scale chip-level memory integration as it requires a large footprint in the order of mm 2 .…”
mentioning
confidence: 99%
“…Various methods have been investigated for all-optical static random access memory (SRAM) cells, including semiconductor optical amplifier-Mach-Zehnder interferometer (SOA-MZI) configurations [11][12][13][14] , SOA-based ring lasers 15 , III-V photonic crystal cavities 16 and optomechanical cavities 17 . SOA-MZI based optical SRAM bit cell reported in 14 exhibit a speed of 10 Gbps, however, these devices are not compatible for large scale chip-level memory integration as it requires a large footprint in the order of mm 2 . On the other hand, photonic crystal cavities 16 and nano-optomechanical cavities 17 can be integrated in a smaller footprint (∼ 100 µm 2 ), but require major modifications to the existing foundry processes involving material or device integration aspects.…”
mentioning
confidence: 99%