An etching technique called phase-change etching was developed. In this technique, only crystalline regions in a phase-change recording film are selectively etched by an alkaline solution, and amorphous regions remain on the sample surface, which means that a phase-change recording film can be used as a resist for pattern formation. By combination of this technique and phase-change recording, fabrication of the dot pattern with a size of about 1∕10 of the fabricating spot was demonstrated. This result indicates the possibility of nanosize fabrication using the phase-change etching technique.
We have developed a near-field optical probe that uses a triangular metallic plate with a three-dimensionally tapered apex as a light source for thermally assisted magnetic recording. Numerical analysis using a finite-element method shows that the size of the optical spot generated at the apex is 15 nm x 20 nm, and the efficiency (defined as the ratio between the power of the optical near field at the surface of the recording medium and that of the incident light) is 15% when the incident light is focused by a lens with a numerical aperture of 0.8. The metallic plate was fabricated on the surface of a quartz slider and used for writing marks on a phase change recording medium. The marks were observed with a scanning electron microscope, and we confirmed that marks with a diameter of 40 nm were successfully written on the medium.
A three-dimensional (3-D) vertical chain-cell-type phase-change memory (VCCPCM) for next-generation large-capacity storage was developed. The VCCPCM features formation of memory holes in multi-layered stacked gates by using a single mask and a memory array without a selection transistor. As a result of this configuration, the number of process steps for fabricating the VCCPCM is reduced. The excellent scalability of the VCCPCM's new phase-change material makes it possible to reduce the cell size beyond the scaling limit of flash memory. In addition, a poly-silicon selection diode makes it possible to reduce the cell factor to 4F 2 . Consequently, relative cost of the VCCPCM compared to 3-D flash memory is reduced to 0.2. IntroductionThe most important requirement for the storage-memory market is reduction of bit cost, and that requirement has been met by reducing the cell size of flash memory. However, high-voltage operation of flash memory makes it difficult to further reduce cell size. It has recently been reported that the bit-cost reduction can be continued by utilizing 3-D flash memory [1]. 3-D flash memory needs fewer process steps compared to simple stacking of flash memory, but reducing cell size is difficult for two reasons. Firstly, a 20-nm-thick ONO layer in the memory hole is needed and, secondly, a vertical poly-silicon selection MOS transistor needs a cell factor of 6F 2 [1]. In this work, a vertical chain-cell-type phase-change memory (VCCPCM), which can overcome these problems concerning 3-D flash in view of bit cost, is proposed. The key technologies of this VCCPCM are (1) a vertical chain cell for reducing the number of process steps, (2) a scalable new phase-change material for reducing cell size, and (3) a poly-Si XY-selection diode for reducing cell factor to 4F 2 . A poly-Si diode [2] and a lateral chain-cell-type PCM [3] were previously developed. Relative bit cost of both 3-D flash memory and VCCPCM is shown in Fig. 1. By virtue of technologies (1) to (3), the relative bit cost of the VCCPCM compared to 3-D flash memory is reduced to 0.2. Table 1 compares characteristics of 3-D flash memory and VCCPCM. In the present study, set, reset, and reading operations of the VCCPCM were confirmed. Moreover, off-current variation of the poly-Si diode was suppressed by short-time annealing.2. Device structure and operation method The structure of the VCCPCM is shown in Fig. 2. The poly-Si selection diode and VCCPCM are connected serially and positioned at the cross points between the bit and word lines. The structure and equivalent circuit of a VCCPCM are shown in Fig. 3. The gate oxide, channel poly-silicon, and the phase-change material are formed on the side of the holes in the stacked gates. Each memory cell consists of a poly-silicon transistor and a phase-change layer connected in parallel. The memory cells are connected serially in the vertical direction. In the set/reset operations, an off-voltage is applied to the gate at the selected cell, and a positive on-voltage is applied to the unselect...
To realize optical discs with the sub-terabyte data capacity, we propose the three-dimensional pit selection (3DPS) method where a single data pit to be read out in a multi-layer disc is selected three-dimensionally to obtain super-resolution in the disc plane and to reduce layer cross-talk. To examine the feasibility of this method, the phase-change pit capsule method was tested where the data pits consist of a phase-change material which melts during readout. The super-resolution effect was observed for both layers of a dual-layer disc. It was shown that a quadric-layer disc can be designed because of the high transmittance of each layer. Thus, 3DPS is considered to have the potential for a data capacity of hundreds of gigabytes with a conventional optical system.
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