In this review, we provide an overview of our work in resistive switching mechanisms on oxide-based resistance random access memory (RRAM) devices. Based on the investigation of physical and chemical mechanisms, we focus on its materials, device structures, and treatment methods so as to provide an in-depth perspective of state-of-the-art oxide-based RRAM. The critical voltage and constant reaction energy properties were found, which can be used to prospectively modulate voltage and operation time to control RRAM device working performance and forecast material composition. The quantized switching phenomena in RRAM devices were demonstrated at ultra-cryogenic temperature (4K), which is attributed to the atomic-level reaction in metallic filament. In the aspect of chemical mechanisms, we use the Coulomb Faraday theorem to investigate the chemical reaction equations of RRAM for the first time. We can clearly observe that the first-order reaction series is the basis for chemical reaction during reset process in the study. Furthermore, the activation energy of chemical reactions can be extracted by changing temperature during the reset process, from which the oxygen ion reaction process can be found in the RRAM device. As for its materials, silicon oxide is compatible to semiconductor fabrication lines. It is especially promising for the silicon oxide-doped metal technology to be introduced into the industry. Based on that, double-ended graphene oxide-doped silicon oxide based via-structure RRAM with filament self-aligning formation, and self-current limiting operation ability is demonstrated. The outstanding device characteristics are attributed to the oxidation and reduction of graphene oxide flakes formed during the sputter process. Besides, we have also adopted a new concept of supercritical CO2 fluid treatment to efficiently reduce the operation current of RRAM devices for portable electronic applications.
An abnormal subthreshold leakage current is observed at high temperature, which causes a notable stretch-out phenomenon in amorphous InGaZnO thin film transistors (a-IGZO TFTs). This is due to trap-induced thermal-generated holes accumulating at the source region, which leads to barrier lowering on the source side and causes an apparent subthreshold leakage current. In order to obtain superior thermal stability performance of a-IGZO TFTs, conducting N2O plasma treatment on active layer was expected to avert defects generation during SiO2 deposition process. Reducing defects generation not only suppresses subthreshold current stretch-out phenomenon but also significantly improves the bias stress stability in a-IGZO TFTs at high temperature.
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