Abstract-Advances in the chip fabrication technology have begun to make manufacturing 3D chips a reality. The road ahead presents many challenges both in the technology and the EDA domains before potential benefits of tightly integrated 3D systems can be reaped. We present our placement and routing algorithms for 3D FPGA and ASIC designs. Our method addresses wire length, delay and area minimization, as well as thermal optimization during placement and routing phases. These flows have been used to obtain optimized layouts for benchmarks with tens to hundreds of thousands of cells.
Fixed-die floorplanning is an important problem in the modern physical design process. An effective floorplanning algorithm is crucial to improving both the quality and the timeto-market of the design. In this paper, we present an analytical floorplanning algorithm that can be used to efficiently pack soft modules into a fixed die. The locations and sizing of the modules are simultaneously optimized so that a minimum total wire length is achieved. Experiments on the MCNC and GSRC benchmarks show that our algorithm can achieve above a 90% success rate with a 10% white space constraint in the fixed die, and the efficiency is much higher than that of the simulated annealing based algorithms for benchmarks containing a large number of modules.
Silicon
nanowires (SiNWs) have attracted increasing attention for
their enhanced light harvesting and large junction area of photovoltaic
devices compared to planar silicon wafers. However, high surface recombination
velocity deteriorates the photovoltaic performance of the SiNW-based
solar cells. Therefore, a passivation step is necessary to avoid this
effect. Here, a small organic molecule, diallyl disulfide (DADS),
has been employed to passivate the surface of SiNWs. This passivation
process was carried out under UV illumination at room temperature.
Covalent Si–C bonds were formed between DADS and the Si surface,
which was experimentally proven to reduce the surface recombination
of photogenerated carriers. Compared with cells employing oxide- or
hydrogen-passivated SiNWs, the power conversion efficiency of devices
employing DADS-passivated SiNWs was 7.2%, which was improved by a
factor of 3.8 and 1.6, respectively. Moreover, the solar cell using
DADS-passivated SiNWs exhibited good stability in air. The S-shaped
current–voltage curves were not observed because of the high
oxidation resistance of the
DADS-modified surface. This simple and effective UV-initiated passivation
procedure with DADS can lower the cost and improve the photovoltaic
performance of SiNW-based solar cells.
In order to explore the pyrolysis mechanism of palm oil as the natural ester insulating liquid from the molecular aspect, the ReaxFF reactive force field was used to simulate the pyrolysis process of palm oil. Firstly, the molecular models of the four main molecules of palm oil—tripalmitin, trilinolein, triolein, and tristearin—are constructed via density functional theory (DFT). Secondly, the vibrational frequencies of the four molecules are calculated, so as to calculate the infrared (IR) spectra. Thirdly, molecular dynamics (MD) simulations employing the ReaxFF method are performed to simulate the pyrolysis reaction of the palm oil system under different temperatures, so as to observe the generation pathways of major products used in the dissolved gas analysis (DGA) in the transformer thermal fault analysis. Finally, hydrogen bonds in the pyrolysis process are counted. It is found that the number of hydrogen bonds gradually increased with the increase of pyrolysis time and pyrolysis temperature. It reveals why the life of the insulating paper immersed with natural esters is prolonged, and why the breakdown voltage is reduced slowly in the actual experiment from another perspective. This study can provide theoretical guidance and effective reference for the thermal fault analysis of an insulating liquid using palm oil as raw material.
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