The introduction of Electron Beam Direct Write lithography into production represents a challenging alternative to reduce cost and cycle time increase induced by the introduction of new generation nodes. This paper details the development work performed to insert transparently direct write lithography process and alignment strategies into CMOS process flows. Finally, this interchangeability between E-Beam and optical lithography steps offers a complete flexibility for device architecture validation and allowed the development of a complete low cost 65nm platform including low-power and general -purpose applications.
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