Nonvolatile and cascadable stateful logic operations are experimentally demonstrated within a 1 k-bit one-transistor-one-resistor (1T1R) resistive random access memory (RRAM) array, where NAND gates serve as the building blocks. A robust dual-gate-voltage operation scheme is proposed. The effects of the transistor ON logic operation and the robustness to device parameter variations are discussed. The parallel 4-bit bitwise XOR operation is experimentally implemented in the 1T1R array by cascading NAND gates. This letter presents a feasible approach to in-memory computing for large-scale circuits.
The resistive random access memory (RRAM) device has been widely studied due to its excellent memory characteristics and great application potential in different fields. In this paper, resistive switching materials, switching mechanism, and memory characteristics of RRAM are discussed. Recent research progress of RRAM in high-density storage and nonvolatile logic application are addressed. Technological trends are also discussed.
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