Experimental evidence of the optimized interface engineering effects in MoS2 transistors is demonstrated. The MoS2/Y2O3/HfO2 stack offers excellent interface control. Results show that HfO2 layer can be scaled down to 9 nm, yet achieving a near-ideal sub-threshold slope (65 mv/dec) and the highest saturation current (526 μA/μm) of any MoS2 transistor reported to date.

Resistive random access memory (ReRAM) has been considered the most promising next-generation nonvolatile memory. In recent years, the switching behavior has been widely reported, and understanding the switching mechanism can improve the stability and scalability of devices. We designed an innovative sample structure for in situ transmission electron microscopy (TEM) to observe the formation of conductive filaments in the Pt/ZnO/Pt structure in real time. The corresponding current-voltage measurements help us to understand the switching mechanism of ZnO film. In addition, high-resolution transmission electron microscopy (HRTEM) and electron energy loss spectroscopy (EELS) have been used to identify the atomic structure and components of the filament/disrupted region, determining that the conducting paths are caused by the conglomeration of zinc atoms. The behavior of resistive switching is due to the migration of oxygen ions, leading to transformation between Zn-dominated ZnO(1-x) and ZnO.

Grain boundaries affect the migration of atoms and electrons in polycrystalline solids, thus influencing many of the mechanical and electrical properties. By introducing nanometer-scale twin defects into copper grains, we show that we can change the grain-boundary structure and atomic-diffusion behavior along the boundary. Using in situ ultrahigh-vacuum and high-resolution transmission electron microscopy, we observed electromigration-induced atomic diffusion in the twin-modified grain boundaries. The triple point where a twin boundary meets a grain boundary was found to slow down grain-boundary and surface electromigration by one order of magnitude. We propose that this occurs because of the incubation time of nucleation of a new step at the triple points. The long incubation time slows down the overall rate of atomic transport.

We report the formation of PtSi nanowires, PtSi/Si/PtSi nanowire heterostructures, and nanodevices from such heterostructures. Scanning electron microscopy studies show that silicon nanowires can be converted into PtSi nanowires through controlled reactions between lithographically defined platinum pads and silicon nanowires. High-resolution transmission electron microscopy studies show that PtSi/Si/PtSi heterostructure has an atomically sharp interface with epitaxial relationships of Si[110]//PtSi[010] and Si(111)//PtSi(101). Electrical measurements show that the pure PtSi nanowires have low resistivities approximately 28.6 microOmega.cm and high breakdown current densities>1x10(8) A/cm2. Furthermore, using single crystal PtSi/Si/PtSi nanowire heterostructures with atomically sharp interfaces, we have fabricated high-performance nanoscale field-effect transistors from intrinsic silicon nanowires, in which the source and drain contacts are defined by the metallic PtSi nanowire regions, and the gate length is defined by the Si nanowire region. Electrical measurements show nearly perfect p-channel enhancement mode transistor behavior with a normalized transconductance of 0.3 mS/microm, field-effect hole mobility of 168 cm2/V.s, and on/off ratio>10(7), demonstrating the best performing device from intrinsic silicon nanowires.