Interface Engineering for High‐Performance Top‐Gated MoS₂ Field‐Effect Transistors

Abstract

Experimental evidence of the optimized interface engineering effects in MoS2 transistors is demonstrated. The MoS2/Y2O3/HfO2 stack offers excellent interface control. Results show that HfO2 layer can be scaled down to 9 nm, yet achieving a near-ideal sub-threshold slope (65 mv/dec) and the highest saturation current (526 μA/μm) of any MoS2 transistor reported to date.

Beyond Graphene: Progress in Novel Two-Dimensional Materials and van der Waals Solids

“…The maximum mobility value of these 2D materials corresponds to a finite flake thickness when used in FET geometry, because the impact of the substrate can be eliminated through charge screening (117). Interface engineering has been employed through the use of hBN or Y 2 O 3 buffer layers to reduce surface roughness scattering and thereby enhance the mobility (118,119). Dielectric engineering using high-k material to increase the mobility, however, remains a controversial topic (120).…”

Black phosphorus: a two-dimensional reductant for in situ nanofabrication

“…1,2 For instance, graphene boasting good optoelectronic characteristics and high mechanical strength has large potential in energy conversion and storage [3][4][5] and transition-metal dichalcogenides (TMDs) with unique semiconducting properties are attractive to scalable digital field-effect transistors. [6][7][8] Furthermore, the chemical reactivity of 2D materials such as graphene oxide (GO) and TMDs has raised concerns and novel templates have been proposed to fabricate functional composites. [9][10][11][12][13][14][15][16][17] Black phosphorus (BP) has emerged to be an exciting member of the 2D family.…”

Improvement in top-gate MoS2 transistor performance due to high quality backside Al2O3 layer

“…[1][2][3][4] Molybdenum disulfide (MoS 2 ), one of the most studied TMDs, is an attractive 2D material with a thickness dependent band gap that has shown high device performance in a traditional top-gate field effect transistor (FET) structure. [5][6][7] Previous studies have shown high on/off ratios ($10 8 ), high mobility values (>200 cm 2 / Vs), and low subthreshold swing ($74 mV/dec) for top-gate MoS 2 devices, typically on SiO 2 . 8 The utilization of SiO 2 is often due to exfoliated MoS 2 having a high optical contrast on SiO 2 dielectric, allowing for quicker and easier detection of flakes.…”