Planar field effect transistors (FET) consisting of a large number of parallel single-walled carbon nanotubes (SWCNT) have been fabricated that allow very high on-currents of the order of several milliamperes and on/off ratios exceeding 500.With these devices it is demonstrated, for the first time, that SWCNTs can be used as transistors to control macroscopic devices, e.g., light emitting diodes and electromotors. Those transistors were fabricated by a very simple process that is based on the catalytic chemical vapor deposition (CCVD) growth of SWCNTs at low temperatures, a single lithographic step to define the source and drain contacts, and a bias pulse to eliminate the metallic SWCNTs.There has been tremendous interest in carbon nanotubes in the past decade 1 due to their superior electronic properties and the possibility that they could replace silicon in future nanoelectronic devices if the integration challenges can be solved. However, carbon nanotubes are also interesting for applications where larger currents have to be switched or detected, e.g., power transistors, flexible electronics, or sensors. Since the maximum current per individual SWCNT is limited to about 25 µA, 2 a parallel arrangement of a large number of SWCNTs is required. Fabrication of such an arrangement requires a process to grow or deposit SWCNTs uniformly on a substrate. Catalytic CVD allows the growth of very clean, amorphous carbon-free SWCNTs on substrates and the control over the density of active catalytic sites and, therefore, the density of the SWCNTs. Control of the SWCNT density is very important in order to achieve transistors with uniform performance, for reasons discussed below. Extensive studies of the CVD growth have shown that this can be achieved by varying the catalyst material, catalyst layer thickness, and the growth parameters. Those results have been published elsewhere. 3,4 The substrate for the SWCNT transistors was p-type silicon with a 50 nm thick atomic-layer-deposited (ALD) Al 2 O 3 with a k-value of about 11. Nickel was chosen as the catalyst metal, since it has been shown that Ni catalyzes the thermal CVD growth of SWCNTs at temperatures as low as 600°C. 5 Ni layers with a nominal thickness of less than 0.2 nm were deposited by a high-precision ion-beam deposition system with a quartz crystal microbalance or by spinon deposition of an ethanol-based nickel-acetate solution. 4 The SWCNTs were grown in a preheated quartz tube furnace at 650°C. After 5-10 min hydrogen pretreatment the growth was initiated by filling the furnace with pure methane to a pressure of 0.3-0.4 bar. After 10 min the growth was stopped by evacuating the furnace and the samples were removed from the furnace after cooling-down to room temperature. Subsequently, the transistors, shown in Figure 1, were defined by e-beam lithography whereby the gap between source and drain, which defines the gate length, was varied ( Figure 2). The smallest gate length was about 90 nm. The total gate width, which is equal to the circumference of the inner ...

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Carbon nanotube field-effect transistors with sub-20 nm long channels and on/off current ratios of >10(6) are demonstrated. Individual single-walled carbon nanotubes with diameters ranging from 0.7 to 1.1 nm grown from structured catalytic islands using chemical vapor deposition at 700 degrees C form the channels. Electron beam lithography and a combination of HSQ, calix[6]arene, and PMMA e-beam resists were used to structure the short channels and source and drain regions. The nanotube transistors display on-currents in excess of 15 microA for drain-source biases of only 0.4 V.

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Despite all prophecies of its end, silicon-based microelectronics still follows Moore's Law and continues to develop rapidly. However, the inherent physical limits will eventually be reached. Carbon nanotubes offer the potential for further miniaturization as long as it is possible to selectively deposit them with defined properties.