The well-known CMOS Quad consisting of two asymmetric differential pairs is a transconductance element. It provides an additional output current proportional to the square of its differential input voltage. Here, we use both the linear and square-law outputs of a Quad to build a high-speed latch that has differential low-voltage output swing. This latch retains the useful property of constant power-supply current like all current-biased differential current-mode logic circuits. Simulation results for 0.18-m CMOS process are presented. The design is application specific and is intended for use in high-speed comparators needed for analog-todigital converters.
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