We have found that the size of some rapid single-flux quantum (RSFQ) logic cells based on conventional 0-type Josephson junctions can be significantly reduced by using a π-type junction as a phase shifter in passive (nonswitching) mode. In comparison with the recently suggested active (switching) π-junctions mode, the passive mode offers much greater operation margins for their critical current Icπ. This gives π-junctions a chance to be implemented in RSFQ designs in the near future. As an example, we have simulated the operation of a toggle flip flop with zero-geometrical inductance of the fluxon storage loop. Simulations show that the parametric inductance of the π-junction and its normal resistance Rn form a low-pass filter, which sets the low limit for π-junctions IcπRn product, but offers a wide range of variations of the other parameters. The possible reduction of RSFQ cell size by using π-junctions opens the way to scale superconducting logic circuits down to the submicron dimensions.

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We have simulated fluxon propagation within a Josephson transmission line that is one of the elements of a rapid single flux quantum (RSFQ) circuit. This line is a parallel connection of damped Josephson junctions coupled by superconducting inductances. Geometries with and without mutual inductances between neighboring cells are considered. If the time interval between two fluxons is less than 0.3 φ0Vc−1 (Vc characteristic voltage) a repulsion between them was observed. The repulsion sets a specific time delay between the fluxons that impose a rigid limitation for high frequency performance of RSFQ logic. The delay depends on the shunting parameter, bias current, and values of interconnecting inductances.

Experiments on a model of rapid single flux quantum (RSFQ) flip-flop cell, based on high-Tc (HTS) Josephson junctions show that it can operate as a voltage divider at frequency up to 400 GHz. The junctions were formed in YBaCuO film, deposited on novel Y–ZrO2 bicrystals with two asymmetric 32° grain boundaries, about 10 μm apart, and allow a new design of RSFQ logic based on a single HTS layer. Small inductances (≂10 pH) were made as narrow, submicron size slits. The junction widths were between 4 and 10 μm and for ten junctions located close to the tested circuits, the linear critical current densities at T=4.4 K were 10.7 μA/μm±50% for one grain boundary and 8.3 μA/μm±50% for the other one. IcRn was about 1 mV±50%. A current density of half the expected value meant that the test circuit did not act as an ideal flip–flop down to the lowest frequency. As a voltage divider it gave a half value division up to 0.82 mV at T=4.4 K and to 0.4 mV at 30 K.

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