This paper describes a parallel pattern mixed level, i.e. switch-level and gate-level, fault simulator.The switch-level allows the simulator to treat faults at the transistor level while the gate level simulation conserves the simulation speed and the parallel pattern strategy further enhances the simulation speed for more than one order of magnitude.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.