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The discovery of ferroelectricity in thin doped hafnium oxide films revived the interest in ferroelectric (FE) memory concepts. Zirconium‐doped hafnium oxide (HZO) crystallizes at low temperatures (e.g., 400 °C), which makes this material interesting for the implementation of FE functionalities into the back end of line (BEoL). So far, the FE phase of prior amorphous HZO films is achieved by using a dedicated rapit thermal annealing (RTA) treatment. However, herein, it is shown that this dedicated anneal is not needed. A sole furnace treatment given by the thermal budget present during the interconnect formation is sufficient to functionalize even ultrathin 5 nm HZO films. This result helps to optimize the integration sequence of HZO films (e.g., involving a minimum number of BEoL process steps), which saves process time and fabrication costs. Herein, metal–FE–metal capacitors with Hf0.5Zr0.5O2 films of different thicknesses (5–20 nm) are fabricated annealed at 400 °C for various durations within different types of ovens (RTA and furnace). Structural and electrical characterization confirms that all furnace‐annealed samples have similar X‐ray diffraction patterns, remanent polarization, endurances, and thickness dependencies as RTA‐annealed ones. With respect to remanent polarization, leakage current, and endurance, the HZO film of 10 nm thickness shows the most promising results for the integration into the BEoL.

The recent discovery of ferroelectricity in thin film HfO2 materials renewed the interest in ferroelectric FET (FeFET) as an emerging nonvolatile memory providing a potential high speed and low power Flash alternative. Here, we report more insight into FeFET performance by integrating two types of ferroelectric (FE) materials and varying their properties. By varying the material type [HfO2 (HSO) versus hafnium zirconium oxide (HZO)], optimum content (Si doping/mixture ratio), and film thickness, a material relation to FeFET device physics is concluded. As for the material type, an improved FeFET performance is observed for HZO integration with memory window (MW) comparable to theoretical values. For different Si contents, the HSO based FeFET exhibited a MW trend with different stabilized phases. Similarly, the HZO FeFET shows MW dependence on the Hf:Zr mixture ratio. A maximized MW is obtained with cycle ratios of 16:1 (HfO2:Si) and 1:1 (Hf:Zr) as measured on HSO and HZO based FeFETs, respectively. The thickness variation shows a trend of increasing MW with the increased FE layer thickness confirming early theoretical predictions. The FeFET material aspects and stack physics are discussed with insight into the interplay factors, while optimum FE material parameters are outlined in relation to performance.

The local crystal phase and orientation of ferroelectric grains inside TiN/Hf0.5Zr0.5O2/TiN have been studied by the analysis of the local electron beam scattering Kikuchi patterns, recorded in transmission. Evidence was found that the ferroelectric phase of the layers is derived from an orthorhombic phase, most likely of space group Pca21. The orientation analysis reveals a strong out-of-plane texture of the polycrystalline film which is in accordance with a high remanent polarization Pr observed for P-V measurements. The results of this analysis help us to further optimize the ratio of ferroelectric grains and their orientation for many applications, e.g., in the field of emerging memory or infrared sensors.

The microstructure of ferroelectric hafnium oxide plays a vital role for its application, e.g., non-volatile memories. In this study, transmission Kikuchi diffraction and scanning transmission electron microscopy STEM techniques are used to compare the crystallographic phase and orientation of Si and Zr doped HfO2 thin films as well as integrated in a 22 nm fully-depleted silicon-on-insulator (FDSOI) ferroelectric field effect transistor (FeFET). Both HfO2 films showed a predominately orthorhombic phase in accordance with electrical measurements and X-ray diffraction XRD data. Furthermore, a stronger texture is found for the microstructure of the Si doped HfO2 (HSO) thin film, which is attributed to stress conditions inside the film stack during crystallization. For the HSO thin film fabricated in a metal-oxide-semiconductor (MOS) like structure, a different microstructure, with no apparent texture as well as a different fraction of orthorhombic phase is observed. The 22 nm FDSOI FeFET showed an orthorhombic phase for the HSO layer, as well as an out-of-plane texture of the [111]-axis, which is preferable for the application as non-volatile memory.

Thin‐film transistors (TFTs) based on amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) have attracted vast attention for use in organic light‐emitting diode (AMOLED) displays due to their high electron mobility and large current on–off ratio. Although amorphous oxide semiconductors show considerably less threshold voltage (Vth) variation than poly‐silicon, large‐area processing and degradation effects can impede the characteristic parameters of a‐IGZO TFTs, which manifests in an uneven brightness distribution across the display panel. Such Vth variations are usually reduced by additional compensation circuits consisting of TFTs and capacitors. Herein, a new approach to compensate such variabilities is demonstrated: the integration of a programmable ferroelectric (FE) film in the gate stack of the TFT. This simplifies the complexity of the pixel cell and potentially minimizes the need for compensation circuits, which is crucial for transparent displays. To test this new approach, fully integrated FE‐TFTs (i.e., with vias contacting a structured bottom gate electrode from the top) based on a‐IGZO and FE hafnium‐zirconium oxide (HZO) are developed. A single low‐temperature post‐fabrication treatment at 350 °C for 1 h in air is used to simultaneously crystallize the HZO film in the FE phase and to reduce the number of defects in the a‐IGZO channel. The structural and electrical characterizations provide comprehensive guidance for the design of effective FE‐TFT gate stacks and device geometries. An accurate control of the polarization state and linear switching between multiple intermediate states is shown by using programming pulses of various amplitudes and widths. Furthermore, a direct correlation between the channel length and the applied pulse width for programming is observed.

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