The discovery of ferroelectricity in thin doped hafnium oxide films revived the interest in ferroelectric (FE) memory concepts. Zirconium‐doped hafnium oxide (HZO) crystallizes at low temperatures (e.g., 400 °C), which makes this material interesting for the implementation of FE functionalities into the back end of line (BEoL). So far, the FE phase of prior amorphous HZO films is achieved by using a dedicated rapit thermal annealing (RTA) treatment. However, herein, it is shown that this dedicated anneal is not needed. A sole furnace treatment given by the thermal budget present during the interconnect formation is sufficient to functionalize even ultrathin 5 nm HZO films. This result helps to optimize the integration sequence of HZO films (e.g., involving a minimum number of BEoL process steps), which saves process time and fabrication costs. Herein, metal–FE–metal capacitors with Hf0.5Zr0.5O2 films of different thicknesses (5–20 nm) are fabricated annealed at 400 °C for various durations within different types of ovens (RTA and furnace). Structural and electrical characterization confirms that all furnace‐annealed samples have similar X‐ray diffraction patterns, remanent polarization, endurances, and thickness dependencies as RTA‐annealed ones. With respect to remanent polarization, leakage current, and endurance, the HZO film of 10 nm thickness shows the most promising results for the integration into the BEoL.

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The local crystal phase and orientation of ferroelectric grains inside TiN/Hf0.5Zr0.5O2/TiN have been studied by the analysis of the local electron beam scattering Kikuchi patterns, recorded in transmission. Evidence was found that the ferroelectric phase of the layers is derived from an orthorhombic phase, most likely of space group Pca21. The orientation analysis reveals a strong out-of-plane texture of the polycrystalline film which is in accordance with a high remanent polarization Pr observed for P-V measurements. The results of this analysis help us to further optimize the ratio of ferroelectric grains and their orientation for many applications, e.g., in the field of emerging memory or infrared sensors.

Thin‐film transistors (TFTs) based on amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) have attracted vast attention for use in organic light‐emitting diode (AMOLED) displays due to their high electron mobility and large current on–off ratio. Although amorphous oxide semiconductors show considerably less threshold voltage (Vth) variation than poly‐silicon, large‐area processing and degradation effects can impede the characteristic parameters of a‐IGZO TFTs, which manifests in an uneven brightness distribution across the display panel. Such Vth variations are usually reduced by additional compensation circuits consisting of TFTs and capacitors. Herein, a new approach to compensate such variabilities is demonstrated: the integration of a programmable ferroelectric (FE) film in the gate stack of the TFT. This simplifies the complexity of the pixel cell and potentially minimizes the need for compensation circuits, which is crucial for transparent displays. To test this new approach, fully integrated FE‐TFTs (i.e., with vias contacting a structured bottom gate electrode from the top) based on a‐IGZO and FE hafnium‐zirconium oxide (HZO) are developed. A single low‐temperature post‐fabrication treatment at 350 °C for 1 h in air is used to simultaneously crystallize the HZO film in the FE phase and to reduce the number of defects in the a‐IGZO channel. The structural and electrical characterizations provide comprehensive guidance for the design of effective FE‐TFT gate stacks and device geometries. An accurate control of the polarization state and linear switching between multiple intermediate states is shown by using programming pulses of various amplitudes and widths. Furthermore, a direct correlation between the channel length and the applied pulse width for programming is observed.

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In this article, the work on Ge nanocrystals embedded in dielectric films formed by phase separation from supersaturated solid solutions is reviewed. Different methods to synthesize supersaturated solid solutions are covered, e.g., magnetron sputtering, ion implantation, and chemical vapor deposition. The phase separation is activated by subsequent high temperature annealing. Important parameters that influence the formation and properties of the Ge nanocrystals are discussed. Various matrix materials like SiO2, Al2O3, HfO2, HfAlOx, Lu2O3, ZrO2, TaZrOx, and Si3N4 are reported in the literature. The influence of the matrix on the formation and properties of the Ge nanocrystals is addressed in this review. Ge nanocrystals are investigated for applications such as charge storage nodes in nonvolatile memory devices or as silicon technology compatible light emitters. A key to establish these applications seems to be embedding the Ge nanocrystals in still amorphous matrices. This could help to avoid grain boundaries that act as leakage paths for electrical charges (unfavorable for nonvolatile memories) and facilitate defects, which could act as recombination centers (unfavorable for light emitters). A further important point is the synthesis of size and position controlled Ge nanocrystals. Both aspects are reviewed for Ge nanocrystals embedded in the mentioned matrix materials.

The ferroelectric properties of hafnium oxide films are strongly influenced by the crystallization process due to the interaction of thermodynamics, kinetics, and mechanical stress. In this work, the influence of annealing temperature on the crystallographic properties and microstructure of Si-doped hafnium oxide thin films as well as their ferroelectric properties are investigated by X-ray diffraction, transmission Kikuchi diffraction, and electrical characterization. The findings reveal the emergence of a [100] and [110] out-of-plane texture for metal−ferroelectric− metal (MFM) and metal−ferroelectric−insulator−semiconductor (MFIS) capacitor structures with increasing annealing temperature, respectively. In combination with observed stress relaxation at higher temperatures and the evolution of the wake-up behavior, insights into the crystallization process and the influence of the interplay of microstructure and stress on the ferroelectric properties of hafnium oxide thin films are given.

Ge-nanocrystals (NCs) were synthesized in amorphous TaZrO x by thermal annealing of cosputtered Ge-TaZrO x layers. Formation of spherical shaped Ge-NCs with small variation of size, areal density, and depth distribution was confirmed by high-resolution transmission electron microscopy. The charge storage characteristics of the Ge-NCs were investigated by capacitancevoltage and constant-capacity measurements using metal-insulator-semiconductor structures. Samples with Ge-NCs exhibit a maximum memory window of 5 V by sweeping the bias voltage from À7 V to 7 V and back. Below this maximum, the width of the memory window can be controlled by the bias voltage. The fitted slope of the memory window versus bias voltage characteristics is very close to 1 for samples with one layer Ge-NCs. A second layer Ge-NCs does not result in a second flat stair in the memory window characteristics. Constant-capacity measurements indicate charge storage in trapping centers at the interfaces between the Ge-NCs and the surrounding materials (amorphous matrix/tunneling oxide). Charge loss occurs by thermal detrapping and subsequent band-to-band tunneling. Reference samples without Ge-NCs do not show any memory window. V