A method for the experimental determination of surface photoemission core-level shifts for 3d transition metals J. Appl. Phys. 98, 014908 (2005); 10.1063/1.1948508 Surface and interface chemical composition of thin epitaxial SrTiO 3 and BaTiO 3 films: Photoemission investigation
The importance of interface and bulk transport mechanisms on the leakage current of high dielectric constant thin film capacitors is examined by deriving an equation for the J–VA characteristic of a capacitor that includes the transport mechanisms of thermionic emission (TE), thermionic field emission (TFE), and carrier drift–diffusion (DD). The current is controlled by the slowest of three effective velocity parameters v1md, vD, and ṽ2dm characterizing electron injection into the dielectric at the cathode by TE and TFE, carrier DD in the film bulk, and electron ejection from the dielectric at the anode by TE and TFE, respectively. The effective velocity parameters are evaluated for a Pt/BST/Pt thin film capacitor that has been exposed to forming gas and it is shown that the dominant transport mechanism is interface limited TFE from the cathode with negligible influence of carrier transport by DD in the film bulk. Implications of these results on existing transport calculations for high dielectric constant thin film capacitors are discussed.
We demonstrate that large and simultaneous improvements in permittivity, tunability, and leakage current density of (Ba,Sr)TiO3 (BST)-based thin-film capacitors can be achieved by yttrium doping. We have found that, for a low deposition temperature (520 °C) sputtering process, Y-doped BST capacitors exhibit tenfold lower leakage current density (<10−9A∕cm2 at 100KV∕cm) and 70% higher permittivity than nominally undoped BST-based capacitors. Furthermore, this work suggests an intriguing correlation between dopant concentration-dependent elastic strain in the films and their enhanced dielectric properties.
Sputter deposited barium strontium titanate (BST) based thin film capacitors have been developed for use in GHz LSI decoupling applications. The fabricated 1.60×1.85 mm2 BST chip decoupling capacitors with Pt electrodes and 150 μm bump pitch, have a capacitance density of 1.2 μF/cm2, low equivalent series inductance of 15 pH, and a low equivalent series resistance of 0.02 Ω. The impedance of the chip capacitors at 1 GHz is over 1000 times lower than conventional multilayered ceramic capacitors. Fundamental electrical and reliability properties of Pt/BST/Pt thin film capacitor structures were also investigated. Capacitors with 200 nm thick BST thin films deposited at 500 °C by RF magnetron sputtering achieved a C/A of 1.8 μF/cm2, leakage current density < 10-9 A/cm2 at 2 volts, and a breakdown field > 2.5 MV/cm at 20 °C. A fit of the failure data to a Weibull distribution indicated at least two different physical mechanisms causing capacitor failure. The primary failure mechanism for 1.5 volt operation was due to resistance degradation without catastrophic capacitor failure. At higher applied voltages, catastrophic capacitor failure occurred with the breakdown event characterized by a thermal runway process. The physical mechanisms contributing to capacitor failure are interpreted to be due to ionic migration and charge injection, and the contribution of these mechanisms to the degradation process could be partially resolved by bi-polar voltage pulse stressing. The projected mean time to failure for 1.5 volt operation is extrapolated to be in excess of 104 years at 75 °C and 126 years at 125 °C. The results indicate that sputter deposited BST thin film capacitors are promising for future GHz LSI decoupling applications.
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