Articles you may be interested inIntegrated microcircuit on a diamond anvil for high-pressure electrical resistivity measurement Appl. Phys. Lett. 86, 064104 (2005); 10.1063/1.1863444Measurement of semi-isolated polysilicon gate structure with the optical critical dimension technique Practical approach to separating the pattern generator-induced mask CD errors from the blank/process-induced mask CD errors using conventional market measurements Critical dimension ͑CD͒ errors are traditionally specified and characterized without reference to their spatial frequency spectra. However, a given amplitude of CD variation can have very different consequences depending on its spectrum. CD errors whose variation is over a few micrometers can be much more serious than those of the same magnitude that extend over several chips. Existing CD metrology tools, such as scanning electron microscopy or electrical resistance measurements, are seldom used to characterize these short-range CD variations, particularly those with spatial wavelengths below 100 m, because of the large amount of data required and the difficulty of collecting data in such a dense grid. We report a new method of measuring CD variations using static random-access memory ͑SRAM͒ circuits in which direct measurements of bit-line currents reveal the individual transistor gate length variations within each memory cell. With the compactness and regularity of the SRAM layout we can measure CD variations with spatial periodicities down to 6 m. By repeatedly measuring each cell in a memory chip and recording the corresponding currents we can achieve sufficient data to minimize noise, and through two-dimensional bandpass filtering 0.2 nm CD variations can be detected. Two designs of 4 Mbit SRAMs fabricated using 250 nm design rules were studied. The resulting CD variations yielded spectra that were dominated by peaks whose origins included uncorrected electron beam and optical proximity effects. Pattern-independent variations ascribable to the reticle generator itself appeared to contribute only a small fraction of the total error observed.

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High-throughput high-density mapping of gate length variations using static random-access memory (SRAM) as electronic test structures is reported. In the experiments, direct measurements of bit-line currents revealed the individual transistor gate length variations within every memory cell. With SRAM and its fast addressing circuits we can measure CD variations with measurement time as fast as 5 s per data point and spatial periodicities down to 6 m. Layout-dependent periodic errors were found to take up 30% to 90% of the total observed error variance, depending on the spatial frequency range and specific measurement grid used. Peaks in the error spectrum were found to be related to the periodicities existing in the circuit layout. Lithography simulations were done as efforts to identify the periodic error sources. It was found that proximity effects and pattern-dependent coma effects contributed to a large percentage of the high spatial frequency errors observed. By independent optical measurements of the poly mask, it was found that the CD error contributions from the mask are very small, and are negligible when compared to the stepper-lens-induced CD errors.