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Raster-scan architectures are mostly oriented toward quality image reproduction [1], but they do not meet some basic requirements,that are crucial for battery-operated sensors for sensor network applications, such as low-energy visual features extraction and control strategies for output bandwidth reduction [2]. We present a 64×128-pixel vision sensor, whose pixels estimate and perform a 1b quantization on the local contrast with a low energy budget. The pixel-embedded time-adaptive visual processing is based on a charge-transfer mechanism, featuring no DC power consumption [3]. The asynchronous readout process takes 147µs and dispatches the column address of each asserted pixel, significantly reducing the chip activity at the interface. For typical indoor visual contrast estimation, involving 5% of the total number of pixels, the sensor exhibits a power consumption of 100µW at 3.3V and 50 frames/s. Fig. 32.7.1. The imager is organized into an addressable array of pixels, with a 64-cells, a ROW DECODER and a COLUMN DECODER made of 128 FIND cells. The raster-scan readout process is completely asynchronous and only dispatches the addresses of the pixels detecting a contrast. This drastically reduces both data bandwidth and power consumption. After scanning the imager, the sensor stops, ready for a new acquisition process. Contrast estimation [4] is implemented using a kernel of three pixels (O, N, E). After reset, the pixels exhibit a voltage discharge ramp, due to the impinging light. The contrast estimation process (Fig. 32.7.2) starts when the most illuminated pixel (VPixN) reaches the threshold V TH1 (t 1 ) and stops at t 2 , when the same threshold is crossed by the least illuminated pixel (VPixO). Within t 1 and t 2 , the voltage drop between VPixO and VPixN is tracked and the final value (V EDGEO ) is sampled and quantized to 1b: V EDGEO = VPixO(t2) -VPixN(t2). A block diagram of the chip is shown inThe n-well/p-sub pixel (Fig. 32.7.3) drives a starved comparator (Comp1) and one of the three inputs of the contrast block (CB) [4]. The CB is also fed by the other two analog signals (VPixN, VPixE) of the neighboring photodiodes (PixelN, PixelE) and by the three comparators (OutO, OutN, OutE). The most illuminated photodiode (VPixN), with the lowest voltage, drives node A, through the source-follower Mp2, discharging Mc1 to V SS (OutO = OutN = OutE = H). VPixN reaches V TH1 at t 1 , breaking the path to V SS (OutN = L), thus allowing the charge to be accumulated on Mc2. The charge transfer process continues until t 2 , the time at which VPixO crosses the threshold. Here, the charge path from Mc1 to Mc2 (OutO = OutN = OutE = L), is turned off and the contrast voltage is held on Mc2 with a gain of about 3, depending on the ratio between the two capacitors:The contrast is estimated dynamically, with no DC power consumption except leakage and photo-generated currents. The contrast block requires 770pJ/pixel, corresponding to 33nW/pixel at 50fps. Comp2 compares V EDGEO with V TH2 and its binary output is either store...

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Summary A wirelessly powered temperature sensor is presented in complementary metal‐oxide‐semiconductor (CMOS) 180‐nm process. The wireless power transfer (WPT) is performed using resonant magnetic coupling, and a diode‐less AC to DC conversion is achieved through a quadrature‐oscillator with native‐MOS. The quadrature‐signals are subsequently used to control the diode‐less rectifier switches. The on‐chip temperature sensor exploits the subthreshold region temperature, and the sensed temperature is converted to frequency using a ring‐oscillator, which is implemented using differential cross coupled oscillator‐based delay cells. The temperature sensor architecture also employs a temperature‐insensitive replica circuit to minimize process dependence and enhance power‐supply rejection ratio (PSRR) of the sensing process. The application‐specific integrated circuit has been designed and fabricated in 180‐nm CMOS process and has dimensions of 2 mm × 2 mm. The measurement results demonstrate that the WPT circuit generates a DC voltage of 1V with a power transfer efficiency of 85% for distances 2 to 8 mm with settling time of microseconds to milliseconds. The temperature sensor demonstrates a resolution of < ±0.6C with a sensitivity of 0.52 mV/C and 126.9 Hz/C along with PSRR of −63dB and Integral Non‐Linraity (INL) of 5% measured across six different dies. The back‐scattering communication demonstrates a −53‐dB signal at a distance of 4 mm without affecting the WPT efficiency. The total power consumption of the temperature sensor along with the integrated biases is 120 nW.