Z" technology FPA architectures offer many advantages over planar technologies, stemming from the much larger electronics real estate available for signal conditioning and processing. Because it is an unconventional architecture for FPAs, producibility of Z -plane technology has frequently been called into question. The HYMOSS® Z -plane technology is now used to package computer electronics and will soon enter high volume production for that family of applications. FPA applications will benefit as well as a result of lowered cost, higher reliability, and available production capacity. In addition, new electronic capabilities will continue to accrue from the incorporation of digital processing and sophisticated interconnect technology. The transition to high volume production is described and the ramifications for FPA manufacturing are identified.
Z-technology utilizes the process of stacking integrated circuits (ICs) to achieve a high degree of packaging density. This technique has been most commonly applied to packaging read out electronics for infrared (IR) focal plane arrays to achieve more signal processing at the detector interface. Irvine Sensor Corporation's (ISC's) standard packaging technology, called HYMOSS (HYbrid Mosaic On Stacked Silicon), has been tailored for stacking 0.004 -inch thick silicon integrated circuits of custom designed read out electronics. New advances have been made which allow for stacking; non -silicon ICs, commercial (non-custom) circuits, and /or ICs which have been thinned to 0.002 inches.
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