Although solution-processable high-k inorganic dielectrics have been implemented as a gate insulator for high-performance, low-cost transition metal oxide field-effect transistors (FETs), the high-temperature annealing (>300 °C) required to achieve acceptable insulating properties still limits the facile realization of flexible electronics. This study reports that the addition of a 2-dimetylamino-1-propanol (DMAPO) catalyst to a perhydropolysilazane (PHPS) solution enables a significant reduction of the curing temperature for the resulting SiO2 dielectrics to as low as 180 °C. The hydrolysis and condensation of the as-spun PHPS film under humidity conditions were enhanced greatly by the presence of DMAPO, even at extremely low curing temperatures, which allowed a smooth surface (roughness of 0.31 nm) and acceptable leakage characteristics (1.8 × 10(-6) A/cm(2) at an electric field of 1MV/cm) of the resulting SiO2 dielectric films. Although the resulting indium zinc oxide (IZO) FETs exhibited an apparent high mobility of 261.6 cm(2)/(V s), they suffered from a low on/off current (ION/OFF) ratio and large hysteresis due to the hygroscopic property of silazane-derived SiO2 film. The ION/OFF value and hysteresis instability of IZO FETs was improved by capping the high-k LaZrOx dielectric on a solution-processed SiO2 film via sol-gel processing at a low temperature of 180 °C while maintaining a high mobility of 24.8 cm(2)/(V s). This superior performance of the IZO FETs with a spin-coated LaZrOx/SiO2 bilayer gate insulator can be attributed to the efficient intercalation of the 5s orbital of In(3+) ion in the IZO channel, the good interface matching of IZO/LaZrOx and the carrier blocking ability of PHPS-derived SiO2 dielectric film. Therefore, the solution-processable LaZrOx/SiO2 stack can be a promising candidate as a gate dielectric for low-temperature, high-performance, and low-cost flexible metal oxide FETs.
Recently, amorphous metal-oxide thin-film transistors (TFTs) have attracted considerable interest as attractive backplane electronics for active matrix organic lightemitting diodes (AMOLEDs) and transparent displays because they offer high mobility, low-temperature processability and good transparency to visible light [1,2]. In particular, low power consumption is one of the key issues for the mobile applications, such as smart phones and tablet personal computers, due to the limited capacity of the rechargeable lithium-ion battery used as power source [3]. The use of a high-k dielectric film as a gate insulator is an effective approach for enhancing the capacitive coupling and reducing the power consumption. Many studies have examined the adoption of high-k dielectric materials, such as HfO 2 [4], TiO 2 [5], AlTiO [6], Ta 2 O 5 [7,8], HfLaO [9] and ZrO 2 [10] in the transition-metal-oxide TFTs. These have generally been fabricated by vacuum deposition methods, such as pulsed laser deposition (PLD) [4], atomic layer deposition (ALD) [5,6], evaporation [7-9] and sputtering [8,10], which require expensive vacuum equipment. In contrast, solution-based deposition techniques, such as spin coating would offer a range of merits, such as simplicity, low cost and high throughput. In this regard, very re-cently there have been many reports on the soluble processed high-k gate dielectrics such as ZrO 2 [11][12][13], Y 2 O 3 [14,15] and HfO 2 [16] for metal-oxide TFTs. Among these high-k dielectrics, the ZrO 2 material is promising due to its high relative permittivity, wide bandgap (5-8 eV) and good thermal stability [17]. Lee et al. reported the highmobility (27.3 cm 2 /V s) ZTO TFTs with soluble processed ZrO 2 gate insulator at an annealing temperature of 500 °C [13]. However, the annealing-temperature-dependent structural property and the resulting electrical performance was not examined in detail. In this Letter, we investigated the effect of annealing temperature on the soluble processed ZrO 2 gated indium zinc oxide (IZO) TFTs. It was found that the low-voltage, high-mobility IZO TFTs with soluble processed ZrO 2 gate insulator can be fabricated at an annealing temperature of 400 °C.A heavily doped p-type silicon (p ++ Si) wafer was used as the bottom gate electrode. A precursor solution for the ZrO 2 film was synthesized using a sol-gel process with ZrCl 4 , HNO 3 and H 2 O dissolved in ethanol. The concentration of the metal precursor was 0.5 M and the ratio of ZrCl 4 :HNO 3 :H 2 O was 1:10 :10. The solution was spincoated on a bare Si substrate for 30 s at 5000 rpm. The re-Spin-coated zirconium oxide films were used as a gate dielectric for low-voltage, high performance indium zinc oxide (IZO) thin-film transistors (TFTs). The ZrO 2 films annealed at 400 °C showed a low gate leakage current density of 2 × 10 -8 A/cm 2 at an electric field of 2 MV/cm. This was attributed to the low impurity content and high crystalline quality. Therefore, the IZO TFTs with a soluble ZrO 2 gate insula-tor exhibited a high field ef...
Indium zinc oxide (IZO) thin film transistors (TFTs) with poly(4-vinylphenol-co-methylmethacrylate) (PVPco-PMMA) gate insulators were fabricated at a low temperature (250 C). The bottom gate IZO TFTs with a PVP-co-PMMA gate electric film exhibited inferior device performance to the top gate IZO TFTs, which was attributed to sputtering damage of the underlying polymer gate dielectric film during IZO channel formation. The charge carrier transport and interface properties of the IZO TFTs could be further improved by introducing a ZrO 2 precursor to the polymer gate insulator. The ZrO 2 molecules were well dispersed in the polymer film. The resulting hybrid dielectric film showed a higher capacitance and a smoother morphology than the PVP-co-PMMA dielectric film. The hybrid dielectric-gated IZO TFT had a high mobility of 28.4 cm 2 V À1 s À1 , low subthreshold gate swing of 0.70 V per decade, and a high I on/off ratio of 4.0 Â 10 7 .
The effects of antimony (Sb) doping on solution‐processed indium oxide (InOx) thin film transistors (TFTs) were examined. The Sb‐doped InSbO TFT exhibited a high mobility, low gate swing, threshold voltage, and high ION/OFF ratio of 4.6 cm2/V s, 0.29 V/decade, 1.9 V, and 3 × 107, respectively. The gate bias and photobias stability of the InSbO TFTs were also improved by Sb doping compared to those of InOx TFTs. This improvement was attributed to the reduction of oxygen‐related defects and/or the existence of the lone‐pair s‐electron of Sb3+ in amorphous InSbO films. (© 2014 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)
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