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Random telegraph noise (RTN) that occurs at in-pixel source follower (SF) transistors and column amplifier is one of the most important issues in CMOS image sensors (CIS) and reducing RTN is a key to the further development of CIS. In this paper, we clarified the influence of transistor shapes on RTN from statistical analysis of SF transistors with various gate shapes including rectangular, trapezoidal and octagonal structures by using an array test circuit. From the analysis of RTN parameter such as amplitude and the current-voltage characteristics by the measurement of a large number of transistors, the influence of shallow trench isolation (STI) edge on channel carriers and the influence of the trap location along source-drain direction are discussed by using the octagonal SF transistors which have no STI edge and the trapezoidal SF transistors which have an asymmetry gate width at source and drain side.

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High signal-to-noise ratio (SNR) image sensors are required in various areas; information equipment including smartphone, industrial measurement, medical, in-vehicle equipment, security, etc. To achieve a high SNR performance, some approaches, such as electron multiplication 1)~3) , using column amplifier 4)5) or ADC 6) , and increasing conversion gain (CG) at floating diffusion (FD) 7)~9) , have been reported. Recently, many researches aiming photon counting have been carried out actively 8)~11). It is necessary to reduce the input referred noise to about 0.20erms for achieving the photon-countable sensitivity 12)~16). Electron multiplying charge coupled device (EMCCD) 2) and single photon avalanche diode (SPAD) 3) , which utilize electron multiplication effect, meet this performance and they are already used as single photon detectors. These photon counting imagers are available to distinguish whether or not one or more photons are incident at single exposure time, however, they cannot count the number of incident photons by one photon due to the following reasons; EMCCD uses electron multiplication effect, which is a stochastic event, with multiple stages, thus output signal distribution overlaps in-between different numbers of incident photons 15)16). SPAD cannot distinguish one or more than one incident photons when more than one photons are incident during a single cycle of idle, build-up, quenching and recharge, thus it has a challenge in linearity 11)15). Meanwhile, another approach to reduce the input referred noise is attempted; using 4transistor pixel CMOS image sensors. They have a good linearity and some of them achieved the noise level below 1.0erms 5)17). Thus, it has a potential for photon counting. In the CMOS image sensor, increasing the gain at the input stage of the readout circuit is the most valid method to reduce the input referred noise. In that sense, increasing CG is the most effective way. Therefore, analysis and reduction of FD capacitance (C FD) components are extremely important. It should be noted that satisfying both high CG and high full well capacity (FWC) is also important. Though many analyses about parasitic capacitance of transistors have been reported in analog/digital fields 18)~25) , analysis of C FD in the CMOS image sensor based on the experiment has not been

Here, C is concentration [mol/m 3 ], α is absorption coefficient [m 2 /mol], L is optical path length [m], I 0 is incident light intensity, I 1 is transmitted light intensity and A λ is absorbance, respectively. Measurement accuracy of absorption analysis is in general determined by the detection accuracy of microscopic change of light intensity under strong light irradiation, where the SNR is given by the equation (2),