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In this paper, two new optimized common-mode voltage reduction PWM (CMVRPWM) strategies based on solving the established constrained nonlinear programming models in the time domain are proposed and analyzed. The proposed current ripple losses optimized CMVRPWM (CRLO-CMVRPWM) minimizes the mean-square values of the three-phase current ripples by calculating the optimized special solutions of the voltage-second balance equations under the designed switching sequences. CRLO-CMVRPWM can achieve better output waveform quality than the existing methods. The proposed switching losses optimized CMVRPWM (SLO-CMVRPWM) on-line optimizes the bus-clamping styles according to the phase currents to minimize the switching losses under different load power factors. Compared to the near-state PWM (NSPWM) with fixed bus-clamping styles, SLO-CMVRPWM can reduce more switching losses in broader range of the modulation index. Simulation and experiment results verify the superiority of the proposed strategies to the conventional ones. Index Terms-Common-mode voltage (CMV), constrained nonlinear programming, current ripple, linear modulation range, pulsewidth modulation (PWM), switching losses, voltage-source inverter (VSI). in 2009 and 2012, respectively.He is currently working toward the Ph.D. degree in power electronics and drives in China University of Mining and Technology.His current research interests include high-power three-level explosion-proof inverter modeling, fault-tolerance control of inverters.