Abstract-In this paper, a CMOS magnetic field to frequency converter with high resolution is presented. It is composed of two voltage-controlled ring oscillators whose output frequency differences linearly vary with the magnetic field perpendicular to the chip surface. The prototype circuit has been fabricated in a 0.5-m CMOS process and operated at a 5-V supply voltage. The measured sensitivity is 24 kHz/mT and the power consumption is 5.1 mW. The small equivalent resolution of at least 20 T can be achieved. The frequency offset is 42 kHz when no magnetic field applied. Its nonlinearity within 120 mT is smaller than 0.56%.Index Terms-C 2 MOS, Magnetic MOSFET (MAGFET), magnetooperational amplifier (MOP), magnetically controlled oscillator (MCO).
A high resolution magnetic-field-to-digital converter (MDC) is presented. It is composed of a magnetic-field-to-pulse width converter (MPC), a cyclic pulse-shrinking time-to-digital converter (TDC) and a polarity detector. This prototype circuit has been fabricated in a 0.5 mm CMOS DPDM process. With a clock rate of 16.6 kHz, the power consumption is 42.5 mW under 5 V supply voltage. The equivalent resolution less than 16 mT can be achieved within the range of 710 mT. After off-line calibration, the remaining offset is 0.017 mT and its gain error is smaller than 0.4%.
In this paper, two magnetic-to-digital converters (MDCs) using single-amplifier-based second-order delta-sigma modulators (DSMs) are presented to detect the dc magnetic field. The proposed second-order DSM required only a single-operational amplifier to achieve the second-order noise shaping. Both the proposed circuits have been fabricated in a 0.5-m CMOS DPDM process, and the resolution of 11 bits can be achieved. The measured sensitivities are 1.486 and 0.459 mV/mT, and the minimum detectable magnetic fields are 0.6 mT and 0.4 mT for the MDC with and without the pre-amplifier, respectively. Both the measured nonlinearities are smaller than 1.3% within the range of 100 mT.
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