In the last decade, hardware Trojan has emerged as a serious concern in integrated circuit (IC) industry. As such, hardware Trojan detection techniques have been studied extensively. However, in order to develop reliable and effective defenses, it is important to figure out how hardware Trojans are implemented in practical scenarios. In this paper, we attempt to make a review of the hardware Trojan design and implementations in the last decade and also provide an outlook. Unlike all previous surveys that discuss Trojans from the defender's perspective, for the first time, we study the Trojans from the attacker's perspective, focusing on the attacker's methods, capabilities and challenges when he designs and implements a hardware Trojan. Particularly, the following questions are explored. What are the current methods and capabilities of attackers after ten years of research and development? By considering more and more sophisticated hardware Trojan detection techniques, what challenges do the attackers face, and vice versa? First, we present adversarial models in terms of the adversary's methods, adversary's capabilities and adversary's challenges in seven practical hardware Trojan implementation scenarios: in-house design team attacks, third-party intellectual property (3PIP) vendor attacks, computer-aided design (CAD) tools attacks, fabrication stage attacks, testing stage attacks, distribution stage attacks, and field programmable gate array (FPGA) Trojan attacks. Second, we analyze the hardware Trojan implementation methods under each adversarial model in terms of seven aspects/metrics: hardware Trojan attack scenarios, the attacker's motivation, feasibility (the practicality of the attacks), detectability (anti-detection capability of that kind of Trojan), protection and prevention suggestions for the designer, overhead analysis, and case studies of Trojan implementations. Finally, future directions on hardware Trojan attacks and defenses are discussed. This paper also presents several new insights and assumptions for the first time, including considering the Trojans not only from the copyright owner's perspective, but also from the users' perspective, and discussing the hardware Trojan attacks in the testing phase and in the distribution phase. This paper can hopefully provide a reference for future works on building effective hardware Trojan defenses.
Approximate computing, for error-tolerant applications, provides trade-offs for computations to achieve improved speed and power performance. Approximate circuits, in particular approximate arithmetic circuits, directly affect the performance of a computing system. Hence, approximate circuit designs have been extensively studied. However, security issues of approximate circuits have been ignored. Moreover, hardware Trojans have been found in fabricated chips in manufacturing industry chains by untrusted foundries. Hardware Trojans could affect the functionality of approximate circuits under very rare circumstances with inconsiderable footprints. In this paper, hardware Trojan insertion methods based on signal transition probability are utilized to investigate and evaluate the security threats in approximate circuits. A approximate low-partor-adder (LOA) adder is utilized as an example and analyzed in the paper. The evaluation results show that with the increase of the number of approximation modules, the approximate LOA adder is more possible to be inserted hardware Trojans than the exact LOA adder.
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