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GaN technology is not only gaining traction in power and RF electronics but is also rapidly expanding into other application areas including digital and quantum computing electronics. This paper provides a glimpse of future GaN device technologies and advanced modeling approaches that can push the boundaries of these applications in terms of performance and reliability. While GaN power devices have recently been commercialized in the 15–900 V classes, new GaN devices are greatly desirable to explore both higher-voltage and ultra-low-voltage power applications. Moving into the RF domain, ultra-high frequency GaN devices are being used to implement digitized power amplifier circuits, and further advances using the hardware–software co-design approach can be expected. On the horizon is the GaN CMOS technology, a key missing piece to realize the full-GaN platform with integrated digital, power, and RF electronics technologies. Although currently a challenge, high-performance p-type GaN technology will be crucial to realize high-performance GaN CMOS circuits. Due to its excellent transport characteristics and ability to generate free carriers via polarization doping, GaN is expected to be an important technology for ultra-low temperature and quantum computing electronics. Finally, given the increasing cost of hardware prototyping of new devices and circuits, the use of high-fidelity device models and data-driven modeling approaches for technology-circuit co-design are projected to be the trends of the future. In this regard, physically inspired, mathematically robust, less computationally taxing, and predictive modeling approaches are indispensable. With all these and future efforts, we envision GaN to become the next Si for electronics.

In this paper, an improved physics-based virtual-source (VS) model to describe transport in quasiballistic transistors is discussed. The model is based on the Landauer scattering theory, and incorporates the effects of: 1) degeneracy on thermal velocity and mean free path of carriers in the channel; 2) drain-bias dependence of gate capacitance and VS charge, including the effects of band nonparabolicity; and 3) nonlinear resistance of the extrinsic device region on g m -degradation at high drain currents in the channel. The improved charge model captures the phenomenon of reduction in VS charge under nonequilibrium transport conditions in a quasi-ballistic transistor. Index Terms-III-V HEMTs, carrier degeneracy, nonlinear channel-access resistance, quantum capacitance, quasi-ballistic transport, Si ETSOI, virtual source (VS). I. INTRODUCTION T HE basic MIT virtual-source (MVS) model provides a simple, physical description of transistors that operate in a quasi-ballistic regime [1], [2]. With only a few fitting parameters, most of which have a physical significance, the model has well served for technology benchmarking [3]. The charge-based compact model describes very well drain-source I -V and all terminal Q-V characteristics in bulk and ETSOI silicon devices [3], [4], III-V transistors [5], and by extension to ambipolar transport to graphene RF transistors [6]-[8].