A facile route to mitigate the Fermi-level pinning between a p-type GaSb semiconductor and an Al2O3 dielectric is proposed. Combination of the sulphurization of the GaSb surface and the subsequent rapid thermal annealing allowed for high quality GaSb/Al2O3 interfacial characteristics; the interfacial trap density value was ≤2.0 × 1012 cm−2 eV−1 in an energy range of 0.05 ≤ ET − Ev ≤ 0.45 eV for the PMOS capacitor via rapid thermal annealing at 575 °C. A physical rationale was given on the basis of the thermo-chemical conversion of Ga2O into Ga2O3 and the conformal elimination of Sb related elements and oxides on the GaSb surface.
It has not been an easy task to deposit SiN at low temperature by conventional plasma-enhanced atomic layer deposition (PE-ALD) since Si organic precursors generally have high activation energy for adsorption of the Si atoms on the Si-N networks. In this work, in order to achieve successful deposition of SiN film at low temperature, the plasma processing steps in the PE-ALD have been modified for easier activation of Si precursors. In this modification, the efficiency of chemisorption of Si precursor has been improved by additional plasma steps after purging of the Si precursor. As the result, the SiN films prepared by the modified PE-ALD processes demonstrated higher purity of Si and N atoms with unwanted impurities such as C and O having below 10 at. % and Si-rich films could be formed consequently. Also, a very high step coverage ratio of 97% was obtained. Furthermore, the process-optimized SiN film showed a permissible charge-trapping capability with a wide memory window of 3.1 V when a capacitor structure was fabricated and measured with an insertion of the SiN film as the charge-trap layer. The modified PE-ALD process using the activated Si precursor would be one of the most practical and promising solutions for SiN deposition with lower thermal budget and higher cost-effectiveness.
The high interfacial trap density in GaAs MOS capacitors is one of the critical issues for realizing high mobility field-effect transistors. This paper proposes a new approach involving the high pressure thermal oxidation (HPO) of GaAs and subsequent HF etching prior to the deposition of an Al2O3 dielectric film. The HPO-treated MOS capacitors exhibited better electrical properties, such as reduced hysteresis and frequency dispersion compared to those of the control capacitors. These improvements were attributed to their reduced interfacial trap density. The relevant rationale is discussed based on the suppression of the Ga2O3 layer between the Al2O3 dielectric and GaAs semiconductor, which resulted from the As excess and Ga deficient surface modification via HPO and subsequent HF etching.
Although GaAs is one of the most attractive channel materials for achieving high electron mobility, reduction of the interface state is still required for high quality MOS devices. In this paper, thermal oxidation under two pressures and various temperatures, and subsequent HF etching were performed to deactivate the interfacial states of the Al 2 O 3 /GaAs stack. High pressure oxidation (HPO) at 10 atm and 400 8C resulted in substantial improvement in the C-V frequency dispersion characteristics whereas the deactivation effect of the interfacial trap density under the thermal oxidations at 1 atm was not observed irrespective of the thermal oxidation temperature, ranging from 400 to 550 8C. Strong disparity between pressure and temperature was elucidated based on the existence of an efficient As excess layer and the prevention of unwanted Ga oxidation.
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