Integration of graphene with Si microelectronics is very appealing by offering a potentially broad range of new functionalities. New materials to be integrated with the Si platform must conform to stringent purity standards. Here, we investigate graphene layers grown on copper foils by chemical vapor deposition and transferred to silicon wafers by wet etching and electrochemical delamination methods with respect to residual submonolayer metallic contaminations. Regardless of the transfer method and associated cleaning scheme, time-of-flight secondary ion mass spectrometry and total reflection X-ray fluorescence measurements indicate that the graphene sheets are contaminated with residual metals (copper, iron) with a concentration exceeding 10(13) atoms/cm(2). These metal impurities appear to be partially mobile upon thermal treatment, as shown by depth profiling and reduction of the minority charge carrier diffusion length in the silicon substrate. As residual metallic impurities can significantly alter electronic and electrochemical properties of graphene and can severely impede the process of integration with silicon microelectronics, these results reveal that further progress in synthesis, handling, and cleaning of graphene is required to advance electronic and optoelectronic applications.

Two-dimensional (2D) layered materials are ideal for micro- and nanoelectromechanical systems (MEMS/NEMS) due to their ultimate thinness. Platinum diselenide (PtSe2), an exciting and unexplored 2D transition metal dichalcogenide material, is particularly interesting because its low temperature growth process is scalable and compatible with silicon technology. Here, we report the potential of thin PtSe2 films as electromechanical piezoresistive sensors. All experiments have been conducted with semimetallic PtSe2 films grown by thermally assisted conversion of platinum at a complementary metal–oxide–semiconductor (CMOS)-compatible temperature of 400 °C. We report high negative gauge factors of up to −85 obtained experimentally from PtSe2 strain gauges in a bending cantilever beam setup. Integrated NEMS piezoresistive pressure sensors with freestanding PMMA/PtSe2 membranes confirm the negative gauge factor and exhibit very high sensitivity, outperforming previously reported values by orders of magnitude. We employ density functional theory calculations to understand the origin of the measured negative gauge factor. Our results suggest PtSe2 as a very promising candidate for future NEMS applications, including integration into CMOS production lines.

Band gap opening and engineering is one of the high priority goals in the development of graphene electronics. Here, we report on the opening and scaling of band gap in BN doped graphene (BNG) films grown by low-pressure chemical vapor deposition method. High resolution transmission electron microscopy is employed to resolve the graphene and h-BN domain formation in great detail. X-ray photoelectron, micro-Raman, and UV-vis spectroscopy studies revealed a distinct structural and phase evolution in BNG films at low BN concentration. Synchrotron radiation based XAS-XES measurements concluded a gap opening in BNG films, which is also confirmed by field effect transistor measurements. For the first time, a significant band gap as high as 600 meV is observed for low BN concentrations and is attributed to the opening of the π-π* band gap of graphene due to isoelectronic BN doping. As-grown films exhibit structural evolution from homogeneously dispersed small BN clusters to large sized BN domains with embedded diminutive graphene domains. The evolution is described in terms of competitive growth among h-BN and graphene domains with increasing BN concentration. The present results pave way for the development of band gap engineered BN doped graphene-based devices.

We demonstrate resistive humidity sensing using a single-layer graphene patch placed on top of a SiO2 layer on a Si wafer.

Metal-halide perovskites are promising lasing materials for the realization of monolithically integrated laser sources, the key components of silicon photonic integrated circuits (PICs). Perovskites can be deposited from solution and require only low-temperature processing, leading to significant cost reduction and enabling new PIC architectures compared to state-of-the-art lasers realized through the costly and inefficient hybrid integration of III−V semiconductors. Until now, however, due to the chemical sensitivity of perovskites, no microfabrication process based on optical lithography (and, therefore, on existing semiconductor manufacturing infrastructure) has been established. Here, the first methylammonium lead iodide perovskite microdisc lasers monolithically integrated into silicon nitride PICs by such a top-down process are presented. The lasers show a record low lasing threshold of 4.7 μJcm–2 at room temperature for monolithically integrated lasers, which are complementary metal–oxide–semiconductor compatible and can be integrated in the back-end-of-line processes.

Abstract-We

Graphene/silicon (G/Si) heterojunction based devices have been demonstrated as high responsivity photodetectors that are potentially compatible with semiconductor technology. Such G/Si Schottky junction diodes are typically in parallel with gated G/silicon dioxide (SiO2)/Si areas, where the graphene is contacted. Here, we utilize scanning photocurrent measurements to investigate the spatial distribution and explain the physical origin of photocurrent generation in these devices. We observe distinctly higher photocurrents underneath the isolating region of graphene on SiO2 adjacent to the Schottky junction of G/Si. A certain threshold voltage (VT) is required before this can be observed, and its origins are similar to that of the threshold voltage in metal oxide semiconductor field effect transistors. A physical model serves to explain the large photocurrents underneath SiO2 by the formation of an inversion layer in Si. Our findings contribute to a basic understanding of graphene/semiconductor hybrid devices which, in turn, can help in designing efficient optoelectronic devices and systems based on such 2D/3D heterojunctions.

Graphene is a material with enormous potential for numerous applications. Therefore, significant efforts are dedicated to large‐scale graphene production using a chemical vapor deposition (CVD) technique. In addition, research is directed at developing methods to incorporate graphene in established production technologies and process flows. In this paper, we present a brief review of available CVD methods for graphene synthesis. We also discuss scalable methods to transfer graphene onto desired substrates. Finally, we discuss potential applications that would benefit from a fully scaled, semiconductor technology compatible production process.