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With the enrichment of new technology in the fields of VLSI design and communication there is also a demand of high speed and low area. The aim of this paper is to design a multiplier circuit based on Vedic sutras. The algorithms based on conventional mathematics can be optimized and simplified by using Vedic sutras. In this paper we have given the design up to Multipliers based on Vedic multiplication sutra "Urdhva-Tiryakbhyam" the design of 2x2, 4x4 has been designed in DSCH2 and all the outputs have been given. The layout of those circuits has been also generated by Microwind. The internal circuit diagram of all the blocks has been explained. The noise, power have been calculated by T-Spice-13 in 45nm Technology. The hardware has also been implemented in XILINX and tested in Basys™2 Spartan- 3E FPGA Board.Index Terms-Urdhva Tiryakbhyam, T-Spice, XILINX, DSCH2, MICROWIND.

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The PIN diode is a promising device in the field of power electronics due to its lower reverse leakage current and lower capacitance. Power electronics industry searches suitable semiconductors as conventional silicon saturates in context of impedance performances with a specified device configuration in the analysis of PIN diode. This paper considers the different materials like Si, Ge, GaAs, SiC-3C, SiC-4H, SiC-6H, GaN-wZ, GaN-zB, InAs to study the variation of intrinsic resistance, junction resistance and total resistance with respect to forward current as well as to study these same parameters with respect to width of the intrinsic region. The characteristics of intrinsic, junction and total resistances of PIN diodes with 10mA forward bias current and 50 micron width of the intrinsic region are noted. Finally it concludes and proposes the superior semiconductor material for PIN diode.

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