A bs tractWe have designed and tested a 64 channel amplifier-comparator integrated circuit on t h e Maxim SHPi bipolar process. The low power design, 840 pW/channel, is intended for use as a frontend with high clock rate silicon strip detector systems. Peaking time at the comparator input is 20 ns, for good double pulse resolution, and noise is near optimum for the technology used. We have used the chip successfully i n a proton beam test at KEK in Japan with a 40 MHz data clock.
Large area (63.6 mm x 64 mm) n-on-n silicon strip detectors have been fabricated, implementing various p-stop structures in the n-side. The detectors were characterized in laboratory and in beamtests. The beamtests showed that the individual p-stop structure collected less charge in the region between the strips than other p-stop structures.
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