To realize the advanced thin-film transistors (TFTs), high-carrier-mobility semiconductor films on insulator structures should be fabricated with low-temperature processing conditions (≤500 °C). To achieve this, we investigated the solid-phase crystallization of amorphous-GeSn films on insulating substrates under a wide range of Sn concentrations (0%–20%), film thicknesses (30–500 nm), and annealing temperatures (380–500 °C). Our results reveal that a Sn concentration close to the solid solubility of Sn in Ge (∼2%) is effective in increasing the grain-size of poly-GeSn. In addition, we discovered that the carrier mobility depends on the film thickness, where the mobilities are determined by the counterbalance between two different carrier scattering mechanisms. Here, vacancy-related defects dominate the carrier scattering near the insulating substrates (≤∼120 nm), and grain-size determined by bulk nucleation dominates the grain-boundary scattering of thick films (≥∼200 nm). Consequently, we obtained the maximum mobilities in samples with a Sn concentration of 2% and a film thickness of 200 nm. The effect of increasing the grain-size of poly-GeSn by lowering the annealing temperature was also clarified. By combining these results, a very high carrier mobility of 320 cm2/Vs was obtained at a low temperature of 380 °C. This mobility is about 2.5 times as high as previously reported data for Ge and GeSn films grown at low temperatures (≤500 °C). Our technique therefore opens up the possibility of high-speed TFTs for use in the next generation of electronics.
Ge 1−x Sn x nanowires (NWs) have been a focus of research attention for their potential in realizing next-generation Si-compatible electronic and optoelectronic devices. To control the growth of NWs and increase their Sn content, the growth mechanism needs to be understood. The use of Au−Sn alloy catalysts instead of Au catalysts allows an easier understanding of Ge 1−x Sn x NW growth, and the effects of Sn at different concentrations in catalysts on growth direction, Sn incorporation, and crystallinity of Ge 1−x Sn x NWs can be clarified. High Sn content in Au−Sn alloy catalysts favors ⟨110⟩-oriented NW growth and high Sn incorporation in NWs. The higher Sn content in Au−Sn alloy catalysts also improves the crystallinity of NWs.
Laterally graded SiGe-on-insulator is the key-structure for next-generation Si-technology, which enables advanced device-arrays with various energy-band-gaps as well as 2-dimensional integration of functional-materials with various lattice-constants. Segregation kinetics in rapid-melting growth of SiGe stripes are investigated in wide ranges of stripe-lengths (10–500 μm) and cooling-rates (10–19 °C/s). Universal laterally graded SiGe-profiles obeying Scheil-equation are obtained for all samples with low cooling-rate (10 °C/s), which enables robust designing of lateral-SiGe-profiles. For samples with high cooling-rates and long stripe-lengths, anomalous two-step-falling profiles are obtained. Dynamical analysis considering the growth-rate-effects enables comprehensive understanding of such phenomena. This provides the unique tool to achieve modulated lateral-SiGe-profiles beyond Scheil equation.
To produce high-performance devices on flexible plastic substrates, it is essential to form Ge-based group IV semiconductors on insulating substrates at low temperatures (≤250 °C). We have developed a technique for solid phase crystallization of amorphous GeSn (≤220 °C) enhanced by Sn doping, and combined with a seeding technique induced by Sn melting (∼250 °C). This combination produces lateral crystallization of amorphous GeSn from seed arrays with no incubation time. As a result, extremely high growth velocities at 220 °C, depending on Sn concentration, e.g., 0.13 μm/h (14% Sn) and 1100 μm/h (23% Sn), are achieved. These velocities are 104–108 times higher than that of pure Ge. This technique enables growth of crystalline GeSn island arrays (diameters: 50–150 μm) at low temperatures (≤250 °C) at controlled positions on insulating substrates.
To realize next-generation flexible thin-film devices, solid-phase crystallization (SPC) of amorphous germanium tin (GeSn) films on insulating substrates combined with seeds formed by laser annealing (LA) has been investigated. This technique enables the crystallization of GeSn at controlled positions at low temperature (∼180 °C) due to the determination of the starting points of crystallization by LA seeding and Sn-induced SPC enhancement. The GeSn crystals grown by SPC from LA seeds showed abnormal lateral profiles of substitutional Sn concentration. These lateral profiles are caused by the annealing time after crystallization being a function of distance from the LA seeds. This observation of a post-annealing effect also indicates that GeSn with a substitutional Sn concentration of up to ∼10% possesses high thermal stability. These results will facilitate the fabrication of next-generation thin-film devices on flexible plastic substrates with low softening temperatures (∼250 °C).
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