This paper discusses improvements to a lateral bipolar device capable of integration into the existing CMOS process flow. With the help of simulations, we demonstrate that the emitter transit time limits the cutoff frequency of a lateral bipolar device. We show that with the introduction of a heterojunction and a partially depleted base, we can decrease the emitter transit time and increase the current gain and the cutoff frequency ( f t ) of the device. For a balanced design, our simulations indicate an n-p-n device with an f t of 812 GHz and an f max of 1.08 THz; and a p-n-p device with an f t of 635 GHz and an f max of 1.15 THz. The collector current at cutoff frequency for both n-p-n and p-n-p devices is ∼0.03 mA-roughly 100 times lower than commercial vertical heterojunction bipolar transistors.
Recent efforts to develop cryogenic processors are based on the elemental superconductor, niobium, and function at 4K. Since conventional silicon-based solutions will not operate at this temperature, new niobium-based memory elements are required. To that end, here we present two novel superconducting memory cells, both based on the Reciprocal Quantum Logic (RQL) nondestructive read-out (NDRO) gate.
A 0.6 um BiCMOS Analog Baseband I C that enables a direct conversion W-CDMA receiver is described, Two diversity Y Q channels provide 87 dB of voltage gain, controllable in 1-dB steps. A 2 Mllz Low Pass Filter, synchronized to an external RC network, provides an accurate rejection mechanism against adjacent channel interference. A log amp provides a "Fast-RSS1" function for rapidly selecting gain settings. Low DC current (<5mA / path), low input noise (<4 nV/ 11z
| In this paper, we discuss the advantages and opportunities presented by high-speed (> 50 GHz) reconfigurable integrated circuits and how they may drive reconfigurable systems applications, such as software-defined radio, radar, and imaging. We propose silicon-germanium (SiGe) BiCMOS as an example technology that enables ultrafast reconfigurable systems and present several circuit designs based on SiGe heterojunction bipolar transistors (HBTs). We compare circuit designs between generations of IBM's SiGe process, including a recent 9HP process featuring devices with a cutoff frequency ðf T Þ of 300 GHz. We describe an architecture for an 8-b 80-Gs/s analog-to-digital converter (ADC) and a 48 Â 48 cell fieldprogrammable gate array (FPGA), which provide powerful solutions for useful functions, such as digital signal processing (DSP) and polyphase filtering. Other circuit concepts are described, including a voltage-controlled oscillator (VCO) with a tuning range of 26 GHz and a high-performance (80 Gb/s) crossbar switch, which provide utility in reconfigurable system applications. Measured results from fabricated implementations of these described systems are presented. We comment on future prospects of these systems and examine an emerging lateral bipolar device (f T ¼ 825 GHz) having 100Â less power consumption than conventional vertical HBTs.
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