This research work investigates the potential of 'Full Home Control', which is the aim of the Home Automation Systems in near future. The analysis and implementation of the home automation technology using Global System for Mobile Communication (GSM) modem to control home appliances such as light, conditional system, and security system via Short Message Service (SMS) text messages is presented in this paper. The proposed research work is focused on functionality of the GSM protocol, which allows the user to control the target system away from residential using the frequency bandwidths. The concept of serial communication and AT-commands has been applied towards development of the smart GSM-based home automation system. Home owners will be able to receive feedback status of any home appliances under control whether switched on or off remotely from their mobile phones. PIC16F887 microcontroller with the integration of GSM provides the smart automated house system with the desired baud rate of 9600 bps. The proposed prototype of GSM based home automation system was implemented and tested with maximum of four loads and shows the accuracy of ≥98%.
Wind turbine works with the principle of extracting energy from the wind to generate electricity. The power generated is directly proportional to the wind speed available. There are two major types of wind turbine design, namely the horizontal and vertical axis wind turbine depending on the orientation of the turbine rotor and its generator. This paper deals with the design of vertical turbine due to its advantage of operating at a low wind speed over that of horizontal turbine. The analysis of change in the parameters of a vertical axis wind turbine is investigated to get the optimized way in which the rotor of the turbine is to be designed. This is done through modelling and simulation of the turbine using various parameters in the MATLAB/SIMULINK environment. A graphical user interface is created for a generic model of vertical axis wind turbine that is used to determine its parameters.
This paper present the development of an adaptive intelligent spider robot. With the incorporation of sensors, the four-legged spider robot is able to monitor the environment wirelessly. A new auto-station adaptation National Instrument (NI) controller in application for intelligent robot is proposed. The research work will solve the weak adaptive ability of conventional existing robot. The proposed project proposes a self-adaptive smart spider robot that functions without human interfacing. The proposed design utilizes the control scheme with National Instruments (NI) LabVIEW to produce a smart portable system. Furthermore, the adaptive intelligent spider robot easily adapts to new situations when facing obstacles. The design is carried out using feed-back loop schematic LabVIEW interfacing with the smart controller and incorporation of GH-311 Ultrasonic Sensor to detect any obstacle in front of the robot, GH-312 Smoke Sensor which use to detect smoke in the particular area and LM35 Temperature sensor to get temperature for the surround. The proposed module was designed and implemented using movable wireless Router Module TP Link TL-MR3420 Router transceiver for device communication. The robot was tested and analyzed showing the system efficiency of above 95%, which is competent in robotic applications [1-4].
The prevalent need for very high speed digital signals processing in wireless communications has driven the communications system to high performance levels. The objective of this paper is to propose a novel structure for efficient implementation for the Fast Fourier Transform (FFT) processor to meet the requirement for high speed wireless communication system standards. Based on the algorithm, architecture analysis, the design of pipeline Radix 2 2 SDF FFT processor based on digit-slicing Multiplier-Less is proposed. Furthermore, this paper proposed an optimal constant multiplication arithmetic design to multiply a fixed point input selectively by one of the several present twiddle factor constants. The proposed architecture was simulated using MATLAB software and the Field Programmable Gate Array (FPGA) Virtex 4 was targeted to synthesis the proposed architecture. The design was tested in real hardware of TLA5201 logic analyzer and the ISE synthesis report results the high speed of 772.966 MHz with the total equivalent gate count of 14,854. Meanwhile, It can be found as significant improvement over Radix 2 2 DIF SDF FFT processor and can be concluded that the proposed pipeline Radix 2 2 DIF SDF FFT processor based on digit-slicing multiplier-less is an enable in solving problems that affect the most high speed wireless communication systems capability in FFT and possesses huge potentials for future related works and research areas.
Problem statement: Fast Fourier Transform (FFT) is widely applied in OFDM trance-receiver communications system. Hence efficient FFT algorithm is always considered. Approach: This study proposed FPGA realization of high resolution high speed low latency floating point adder/subtractor for FFT in OFDM trance-receiver. The design was implemented for 32 bit pipelined adder/subtractor which satisfied IEEE-754 standard for floating-point arithmetic. The design was focused on the trade-off between the latency and speed improvement as well as resolution and silicon area for the chip implementation. In order to reduce the critical path and decrease the latency, the novel structure was designed and investigated. Results: Consequently, synthesis report indicated the latency of 4 clock cycles due to each stage operated within just one clock cycle. The unique structure of designed adder well thought out resulted 6691 equivalent gate count and lead us to obtain low area on chip. Conclusion: The synthesis Xilinx ISE software provided results representing the estimated area and delay for design when it is pipelined to various depths. The report showed the minimum delay of 3.592 ns or maximum frequency of 278.42 MHz
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