The recent advancement in the application of the internet of things in the smart grid has led to an industrial revolution in the power industry. The Industry 4.0 revolution has already set in, allowing computers to interact for an efficient and intelligent approach in solving smart grid issues. multilevel inverters (MLIs) are an integral part of the smart grid system for integrating the distributed generation sources and storage energy systems into the smart grid. It attracted attention in industrial applications as they can handle high power and high voltage with an inherent feature of superior output voltage waveform quality. Moreover, its variant, the switched-capacitor MLI (SCMLI), has the added benefit of lesser DC supply requirement. In this paper, a switched-capacitor multilevel inverter topology has been proposed, which can operate in symmetric and asymmetric mode. The proposed SCMLI generate thirteen and thirty-one level output voltages for symmetric and asymmetric selection of DC voltage sources, respectively. The proposed SCMLI has a smaller number of switching devices for a given output voltage level as compared to other recently proposed topologies. A thorough comparison is presented with the recently proposed topologies on several parameters, including cost function. To validate the proposed topology, symmetric and asymmetric cases were simulated using Mthlab® 2018a and the results were verified using an experimental hardware setup.
A new triple voltage boosting switched-capacitor multilevel inverter (SCMLI) is presented in this paper. It can produce 13-level output voltage waveform by utilizing 12 switches, three diodes, three capacitors, and one DC source. The capacitor voltages are self-balanced as all the three capacitors present in the circuit are connected across the DC source to charge it to the desired voltage level for several instants in one fundamental cycle. A detailed comparative analysis is carried to show the advantages of the proposed topology in terms of the number of switches, number of capacitors, number of sources, total standing voltage (TSV), and boosting of the converter with the recently published 13-level topologies. The nearest level control (NLC)-based algorithm is used for generating switching signals for the IGBTs present in the circuit. The TSV of the proposed converter is 22. Experimental results are obtained for different loading conditions by using a laboratory hardware prototype to validate the simulation results. The efficiency of the proposed inverter is 97.2% for a 200 watt load.
As the applications of power electronic converters increase across multiple domains, so do the associated challenges. With multilevel inverters (MLIs) being one of the key technologies used in renewable systems and electrification, their reliability and fault ride-through capabilities are highly desirable. While using a large number of semiconductor components that are the leading cause of failures in power electronics systems, fault tolerance against switch open-circuit faults is necessary, especially in remote applications with substantial maintenance penalties or safety-critical operation. In this paper, a fault-tolerant asymmetric reduced device count multilevel inverter topology producing an 11-level output under healthy conditions and capable of operating after open-circuit fault in any switch is presented. Nearest-level control (NLC) based Pulse width modulation is implemented and is updated post-fault to continue operation at an acceptable power quality. Reliability analysis of the structure is carried out to assess the benefits of fault tolerance. The topology is compared with various fault-tolerant topologies discussed in the recent literature. Moreover, an artificial intelligence (AI)-based fault detection method is proposed as a machine learning classification problem using decision trees. The fault detection method is successful in detecting fault location with low computational requirements and desirable accuracy.
Multilevel inverters (MLIs) are used on a large scale because they have low total harmonic distortion (THD) and low voltage stress across the switches, making them ideal for medium- and high-power applications. The authenticity of semiconductor devices is one of the main concerns for these MLIs to operate properly. Due to the large number of switches in multilevel inverters, the possibility of a fault also arises. Hence, a reliable five-level inverter topology with fault-tolerant ability has been proposed. The proposed topology can withstand an open-circuit (OC) fault caused when any single switch fails. In comparison to typical multilevel inverters, the proposed topology is fault-tolerant and reliable. The simulation of the proposed topology is conducted in MATLAB-Simulink and PLECS software packages, and the results obtained for normal pre-fault, during-fault, and after-fault conditions are discussed. Experimental results also prove the proposed cell topology’s robustness and effectiveness in tolerating OC faults across the switches. Furthermore, a thorough comparison is provided to demonstrate the proposed topology’s superiority compared to recently published topologies with fault-tolerant features.
An 11-level switched-capacitor multilevel inverter (SCMLI) with 2.5 times boosting feature is presented in this paper. It can produce an 11-level output voltage waveform by utilizing 14 switches, 3 capacitors, 2 diodes, and 1 DC source. Only nine driver circuits are needed as the topology has three pairs of complementary switches and two bidirectional switches. It has inherent capacitor self-balancing property as the capacitors are connected across the DC voltage source during several states within a fundamental cycle to charge the capacitors to the input voltage. A detailed comparison shows the effectiveness of the proposed topology in terms of the number of switches, number of capacitors, number of sources, total standing voltage (TSV), efficiency, and boosting ability with the state-of-art recently proposed circuits. Subsequently, the performance of the proposed SCMLI is validated experimentally utilizing the nearest level control (NLC), a fundamental frequency-based switching technique.
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