A Cd(ii)-based metal–organic framework (MOF) has been demonstrated to have trifunctional properties, namely as an efficient and selective adsorbent for dyes, a visible-light-active photocatalyst for the degradation of dyes and a photocatalyst for Cr(vi) reduction.
Abstract. In this article we present a structured approach to formal hardware verification by modeling circuits at the register-transfer level using a restricted form of higher-order logic. This restricted form of higher-order logic is sufficient for obtaining succinct descriptions of hierarchically designed register-transfer circuits. By exploiting the structure of the underlying hardware proofs and limiting the form of descriptions used, we have attained nearly complete automation in proving the equivalences of the specifications and implementations. A hardware-specific tool called MEPHISTO converts the original goal into a set of simpler subgoals, which are then automatically solved by a general-purpose, first-order prover called FAUST. Furthermore, the complete verification framework is being integrated within a commercial VLSI CAD framework.
A study was carried out to determine the feasibility of using the Cu electroplating process to achieve good gap fill in interchip-via ͑ICV͒ wafers, focusing on the effect different current wave forms have on electroplated Cu film properties, the gap fill capability and the chemical mechanical planarization process. It was found that the roughness of direct current ͑dc͒-plated Cu films is at least three times lower than that of pulse-plated films and the roughness of the latter was observed to be strongly dependent on the magnitude of forward (I f ) and reverse (I r ) currents. This produced a significant difference in reflectivity between the two types of films. The as-deposited dc-and pulse-plated Cu films were also found to have specific resistivities of ϳ2.2 and ϳ2.1 ⍀ cm, respectively. They were reduced to a similar value of 1.77 ⍀ cm after annealing at 200°C. All the dc and higher I f pulse-plating processes produced Cu films having an average polish rate of 7000 Å/min with the polish rate U% less than 3%, showing a fluctuating profile across the wafer. The higher I r pulse-plated film showed a very low polish rate of 210 Å/min with the polish rate U% at 58%, resulting in a dome profile. The multistep dc plating process was found unsuitable for the filling of large vias in the ICV wafers as it resulted in conformal plating with a large center seam being seen due to the pinch-off effect at the top of the via. The pulse-plating process showed a significant improvement in the gap fill capability with a reduction in the size of the center void. The pinch-off effect was also greatly reduced when higher I r was used and an increase in bottom coverage could also be seen, resulting in acceptable gap fill with only a small center void in the ICV wafers.
Haloperoxidase enzymes utilize metal hypohalite species to halogenate aliphatic and aromatic C–H bonds to C–X (X = Cl, Br, I) in nature. In this work, we report the synthesis and...
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