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An aluminum-titanium metallization scheme for use in silicon integrated circuits is described. This metallization can produce high-conductance electrical contacts with negligible dissolutions of silicon. The desirable contact is lost, however, if a TiAl3 reaction product is allowed to consume the entire Ti layer. The TiAl3 forms during the postmetallization heat treatment used to stabilize the electrical characteristics of the contact. The Ti layer is found to be consumed in this reaction at a rate proportional to t1/2, where the rate constant is determined to be d=d0 exp(−Ea/kT), where d0 ≈ 0.15 cm2/sec and Ea ≈ 1.85 eV. This rate constant can be used to determine the thickness of titanium layer necessary to produce the desirable electrical contact.

Extremely strong bonds can be formed between smooth, clean layers of Si3N4 at temperatures ranging between 90 and 300 °C. These bonds have been formed between Si3N4 layers deposited on various substrates with deposition temperatures as low as 300 °C. The bond is initially formed at room temperature and subsequently annealed at temperatures ranging between 90 and 300 °C. Thus, the materials bonded in this manner are never exposed to temperatures higher than 300 °C. This low temperature bond greatly expands the range of applications of direct bonding which had heretofore been restricted by the temperatures of 700 to 1000 °C required by conventional wafer bonding.

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An integrated substrate, consisting of more than one material or material structure, is highly desirable for optimizing performance of multiple-device types on a single chip or for growing high-quality heteroepitaxial films on compliant substrates. A typical integrated substrate contains a stack of thin layers of similar or dissimilar materials that are either amorphous, or poly- or single-crystalline with a variety of lattice constants or crystallographic orientations. Partially or fully processed device layers can also be transferred onto a desired substrate where the transferred device layer can be further processed on the opposite side of its original surface. In this article, we focus on issues related to layer transfer for material integration.Layer transfer from a hydrogen (H)-implanted wafer onto a desired substrate by wafer bonding and layer splitting (the so-called “Smart-Cut®” method) is an attractive approach to prepare integrated materials, such as-silicon-on-insulator (SOI), SiC or GaAs on oxidized silicon, and Ge on glass.