Abstruct-The conduction mechanism and the origins of the leakage current in undoped channel polycrystalline silicon thin-film transistors fabricated under a variety of processing conditions were investigated. Leakage currents below 1 nA at drain-source voltages of 40 V were achieved in both n-type and p-type devices. The effective channel electron and hole mobilities were 75 and 42 cm2/Vs, respectively. Measured stage delay times for CMOS ring oscillators as a function of supply voltage agreed well with theoretical calculations. The effective carrier mobility was shown to have a minimum at a gate voltage corresponding to the point at which all traps are filled. Both dark and photo-induced leakage currents were determined to be controlled by generation from the grain boundary traps. The voltage drop across individual gates in multi-gated structures was investigated as a function of gate voltage. The use of multiple gates at high drain-source potentials was found to decrease both dark and photo-induced leakage currents.

No abstract