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Nonvolatile logic devices have attracted intensive research attentions recently for energy efficiency computing, where data computing and storage can be realized in the same device structure. Various approaches have been adopted to build such devices; however, the functionality and versatility are still very limited. Here, 2D van der Waals heterostructures based on direct bandgap materials black phosphorus and rhenium disulfide for the nonvolatile ternary logic operations is demonstrated for the first time with the ultrathin oxide layer from the black phosphorus serving as the charge trapping as well as band‐to‐band tunneling layer. Furthermore, an artificial electronic synapse based on this heterostructure is demonstrated to mimic trilingual synaptic response by changing the input base voltage. Besides, artificial neural network simulation based on the electronic synaptic arrays using the handwritten digits data sets demonstrates a high recognition accuracy of 91.3%. This work provides a path toward realizing multifunctional nonvolatile logic‐in‐memory applications based on novel 2D heterostructures.

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Aligned carbon nanotube (A‐CNT) films are expected to be an ideal channel material for constructing field‐effect transistors (FETs) that outperform conventional transistors, and multiple methods are developed to fabricate A‐CNT films with high semiconducting purity, good alignment, and high density. However, the reported A‐CNTs‐based FETs are almost all depletion‐mode FETs and suffer from poor subthreshold swing (SS). In this study, enhancement‐mode (E‐mode) FETs based on A‐CNT films are fabricated by systematically optimizing the channel material and CNT/high‐k/metal gate stack. The carrier mobility in top‐gate A‐CNT FETs reaches a maximum value of 1850 cm2 V−1 s−1, which is near that of chemical‐vapor deposition grown individual CNTs and sets a record among A‐CNT films. The fabricated 200 nm‐gate length p‐type A‐CNT FETs present a SS of 73 mV dec−1, the transconductance of 1 mS µm−1, and an on‐current of 1.18 mA µm−1 at a bias of ‐1 V, indicating a real performance exceeding that of commercial Si‐based transistors at a similar gate length. Based on the high‐performance and uniform E‐mode FETs, ring oscillators with stage numbers 5, 7, 9, and 11 are fabricated with an optimized design and high yield, exhibiting a record propagation gate delay of 11.3 ps among CNT‐ and other nanomaterial‐based ICs.

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a great challenge for top-gate RF device fabrication since atomic layer deposition (ALD) typically needs oxygen or water as precursor. [13][14][15] Even though recent research progress of capping BP with ALD high-κ dielectrics shows effective suppression of the black phosphorus surface oxidation, [16][17][18] this process still degrades the electric performance of BP transistors compared with the back-gate devices with minimal exposure to precursors. [19] As shown in previous studies, electric performance of BP FETs can be dominated by the channel dielectric interface where ALD high-κ dielectrics performs better than conventional SiO 2 . For instance, backgate BP transistors on high-κ substrate exhibit improved device performance in comparison with BP FETs on conventional SiO 2 . [11,20] Also, encapsulation by hexagonal boron nitride results in great enhancement of the hole mobility of BP. [6,21,22] However, this approach requires multiple dry transfer steps for both black phosphorus and hexagonal boron nitride flakes with precise alignment for a single device, and thus it has extremely low throughput and yield.In this paper, we report a new approach toward high-performance BP RF transistors using a Damascene-like planarization process to create an embedded gate stack with high-κ dielectrics, which enables high-quality interface while avoids the precursor exposure to the BP channel surface at the same time. [23,24] Side-by-side comparison with two conventional topgate structures shows at least twice improvement in the radio frequency performance of the embedded gate devices. Systematic studies of the radio frequency performance from room temperature down to 20 K are carried out for the first time.A record high extrinsic f max of 17 and 31 GHz for the device with 400 nm gate length has been achieved at room temperature and 20 K, respectively. The ratio of f max /f T has been improved to over two, a twice improvement over previous results, showing a significant advantage in power gains compared with graphene transistors. [23,24]

Transition metal dichalcogenides (TMDCs) are emerging two-dimensional materials for their potential in next-generation electronics. One of the big challenges is to realize a large single-crystal TMDCs film with high mobility, which is critical for channel materials. Herein, we report an optimized atmospheric pressure chemical vapor deposition method for growing large single-crystal monolayer MoS2 on molten glass substrate with domain size up to 563 μm. Better interface quality can be achieved using high-κ dielectrics with respect to the conventional thermal SiO2. Mobility up to 24 cm2 V−1 s−1 at room temperature and 84 cm2 V−1 s−1 at 20 K can be obtained. This low-cost growth of high-quality, large single-crystal size of two dimensional materials provides a pathway for high-performance two dimensional electronic devices.

Tunable bandgap can be induced in Bernal-stacked bilayer graphene by a perpendicularly electric displacement field. Here, we carry out a comprehensive study on the material synthesis of CVD Bernal-stacked bilayer graphene and devices for amplifying and mixing at high frequencies. The transistors show large output current density with excellent current saturation with high intrinsic voltage gain up to 77. Positive extrinsic forward power gain | S| has been obtained up to 5.6 GHz as well as high conversion gain of -7 dB for the mixers. The conversion gain dependence on tunable on/off ratio of the transistors has also been discussed.