We studied the thermal and magnetic properties of a cylindrical quantum dot in the presence of external electric and magnetic fields. The energy spectrum and wave functions for the quantum dot of asymmetric confinement are obtained by solving the Schrödinger wave equation analytically. The energy levels are employed to calculate the canonical partition function, which in turn is used to obtain specific heat, entropy, magnetization, and susceptibility. These thermal and magnetic quantities are found to have direct dependence on confinement length, magnetic field, and temperature, thus the parameters of the system can be tuned to fit into more than one application. PACS Nos.: 78.40.Fy, 75.75.-c, 68.65.Hb. Résumé : Nous étudions ici les propriétés thermiques et magnétiques de points quantiques cylindriques en présence de champs électriques et magnétiques externes. Nous solutionnons analytiquement l'équation de Schrödinger pour le spectre en énergie et les fonctions d'ondes de ce point quantique de confinement asymétrique. Les énergies propres permettent de calculer la fonction de partition canonique qui nous donne la capacité calorifique, l'entropie, la magnétisation et la susceptibilité. Nous trouvons que ces quantités thermiques et magnétiques dépendent directement de la longueur de confinement, du champ magnétique et de la température et qu'ainsi les paramètres du système peuvent être accordés pour satisfaire plus d'une application. [Traduit par la Rédaction]
FPGAs have become complex, heterogeneous platforms targeting a multitude of different applications. Understanding how a design maps to them and consumes various FPGA resources can be difficult to predict, so typically designers are forced to run full synthesis on each iteration of the design. For complex designs that involve many iterations and optimizations, the run-time of synthesis can be quite prohibitive. In this paper, we describe a fast and accurate method of estimating the FPGA resources of any RTL-based design. We achieve run-times that are more than 60 times faster than synthesis and is on average within 22% of the actual mapped slices across a large benchmark suite targeting three different FPGA families. This resource estimator tool is first provided in Xilinx PlanAhead 10.1.
W e present a library mapping technique that synthesizes a source memory module from a library of target memory modules. W e define the library mapping problem f o r memories, identib and solve the three subproblems of port, bit-width and size (word) mapping associated with this task and finally combine these solutions into an eficient memory mapping algorithm. Experimental results on a number of memoryintensive designs demonstrate that our memory mapping approach generates a wide variety of cost-effective designs, often counter-intuitive ones, based on a usergiven cost function and the target library.
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