We propose a nonlinear mitigation algorithm designed from an ASIC perspective, and analyze implementation aspects. Given 9 signal and 11 coefficient bits, reach is increased by 105% compared to linear compensation in single-channel 16-QAM transmission.

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We consider the effects of limited-resolution arithmetic on the performance of Time-Domain Digital Back Propagation. By minimizing resulting ISI of the quantized FIR impulse responses, we can achieve floating-point performance using 9-bit pairwise optimized filter coefficients.

We present forward error correction systems based on soft-decision low-density parity check (LDPC) codes for applications in 100-400-Gbps optical transport networks. These systems are based on the low-complexity "adaptive degeneration" decoding algorithm, which we introduce in this paper, along with randomly-structured LDPC codes with block lengths from 30 000 to 60 000 bits and overhead (OH) from 6.7% to 33%. We also construct a 3600-bit prototype LDPC code with 20% overhead, and experimentally show that it has no error floor above a bit error rate (BER) of 10 −15 using a field-programmable gate array (FPGA)-based hardware emulator. The projected net coding gain at a BER of 10 −15 ranges from 9.6 dB at 6.7% OH to 11.2 dB at 33% OH. We also present application-specific integrated circuit synthesis results for these decoders in 28 nm fully depleted silicon on insulator technology, which show that they are capable of 400-Gbps operation with energy consumption of under 3 pJ per information bit. Index Terms-Application-specific integrated circuit (ASIC) synthesis, forward error correction (FEC), low-density parity-check (LDPC) codes, low power.

In this paper, we propose a new finite impulse response (FIR) filter for chromatic dispersion compensation which is given in closed form. We identify a relation between the out-of-band gain and the in-band error when the filter is implemented with finite-precision arithmetic. In particular, a large out-of-band gain makes the filter more sensitive to coefficient quantization errors due to finite precision digital signal processing. To improve robustness to coefficient quantization errors, our proposed filter is designed based on confining the out-of-band gain. By means of simulations, we show that our filter outperforms other existing FIR filters. The performance gain improves with increasing modulation order and decreasing number of bits used to represent the filter taps.

Implementing forward error correction (FEC) for modern long-haul fiber-optic communication systems is a challenge, since these high-throughput systems require FEC circuits that can combine high coding gains and energy-efficient operation. We present VLSI decoder architectures for product-like codes for systems with strict throughput and power dissipation requirements. To reduce energy dissipation, our architectures are designed to minimize data transfers in and out of memory blocks, and to use parallel non-iterative component decoders. Using a mature 28-nm VLSI process technology node, we showcase different product and staircase decoder implementations that have the capacity to exceed 1-Tb/s information throughputs with energy efficiencies of around 2 pJ/bit.

We consider time-domain digital backpropagation with chromatic dispersion filters jointly optimized and quantized using machine-learning techniques. Compared to the baseline implementations, we show improved BER performance and >40% power dissipation reductions in 28-nm CMOS.