A "50 Q" noise figure measurement system has been integrated into a fully automated s-parameter measurement system allowing for fast determination of transistor noise parameters as well as s-parameters, as a function of both frequency and bias. This functionality from such a simple measurement system is achieved using a new analysis technique, based on the "Noise Temperature Model" [l], that allows, after s-parameter measurements and analysis, for the direct extraction of all four transistor noise parameters from a single noise figure measurement.
INTRODUCTIONThe determination of the transistor noise parameters (e.g.
Extensive attenuation data of coplanar lines on semi-insulating GaAs and InP is presented over the frequency range 1-60 GHz. On-wafer measurements were used to obtain the S-Parameters. A ground-to-ground spacing of 30,60,90 and 120 mm, typical for that used in todays microwave and millimeterwave integrated circuit applications, was investigated. The center line width (impedance) and the evaporated gold metal thickness were varied. For the frequency range investigated (metal thickness less than 2-3 times the skin depth), the attenuation was found to be inversely proportional to the metal thickness. The attenuation varies with frequency as fhighn, with n smaller than 0.5
A measurement system combining vector corrected waveform measurements with active harmonic load-pull extends, for the first time, real-time experimental waveform engineering up to the 30W power level. This novel harmonic load-pull approach is demonstrated on a 4W LDMOS device. A 20% increase in maximum output power to 4.7Watts without degrading gain and efficiency was realized.
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