The Si/dielectric interface properties influence device performance significantly. Often the interface is not stable and changes during and/or after the growth. For a better understanding of the interface and layer formation processes of Nd2O3 on Si(001), as an example for the lanthanide oxides, well-defined experimental studies by reflection high-energy diffraction and x-ray photoelectron spectroscopy were performed under ultraclean ultrahigh vacuum conditions of molecular beam epitaxy. Complementary investigations were performed by transmission electron microscopy. We found that Nd2O3 is a candidate for replacing silicon dioxide as gate dielectric in future Si devices with suitable band gap and offset with respect to silicon. However, under ultrahigh vacuum conditions, silicide formation occurs in the initial stage of growth, which can result in large silicide inclusions and hole formation during further growth. This effect can be completely prevented by modifying the oxygen partial pressure during the interface formation and layer growth.

We investigated the influence of additional oxygen supply and temperature during the growth of thin Gd2O3 layers on Si(001) with molecular beam epitaxy. Additional oxygen supply during growth improves the dielectric properties significantly; however, too high oxygen partial pressures lead to an increase in the lower permittivity interfacial layer thickness. The growth temperature mainly influences the dielectric gate stack properties due to changes of the Gd2O3∕Si interface structure. Optimized conditions (600°C and pO2=5×10−7mbar) were found to achieve equivalent oxide thickness values below 1nm accompanied by leakage current densities below 1mA∕cm2 at 1V.

We report on hybrid microtubes and rings fabricated from rolled-up strained metal–semiconductor SiGe/Si/Cr and metal–insulator–semiconductor SiGe/Si/SixNy/Cr films. For making suspended microtubes, a method of directional rolling of the patterned films by anisotropic underetching of silicon substrate was introduced. It is shown quantitatively that Cr and SixNy layers are highly strained, the tensile stress being sufficient to cause the rolling-up of the hybrid films into microtubes of preset diameter. The proposed controllable and reproducible technology is promising for fabricating cylindrical-shaped microcapacitors, induction coils, transistors, and building blocks of microelectromechanical devices.

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We report room temperature current voltage characteristics of Si p+-i-n+ Esaki diodes integrated on silicon substrates. The diodes were fabricated by low-temperature molecular beam epitaxy. Very high and abrupt p- and n-type dopant transitions into the 1020 cm−3 ranges are achieved by boron and antimony, respectively. The integrated devices are realized without a postgrowth annealing step. The silicon Esaki diodes show negative differential resistance at room temperature with excellent peak to valley current ratios up to 3.94. A variation in the thickness of the silicon tunneling barrier changes the peak current density over three orders of magnitude.