This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18 μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.
Healthcare solutions through the introduction of wearable healthcare devices are benefitting from Internet of Things technology. Though these small form-factor wearable devices promise great benefits, guaranteeing long device operating lifetime is yet the biggest challenge due to high-energy consumption. In this paper, a reduced hardware architecture system-on-chip targeting digital block design was proposed higher energy efficiency. The design has been verified by synthesizing into FPGA and implemented in silicon based on Silterra 180nm process. Results show that the proposed design achieved reduction up to 24% of leakage power and 15% of dynamic power reduction over reference design. In addition, 24.3% of excessive area was reduced by using the proposed reduced hardware architecture technique.
The popular use of biomedical implants has been going on in numerous applications that include the use of pacemakers and emerging retina prostheses, together with brain-computer interfaces. Other popular uses include drug delivery and smart orthopaedic implants. The avoidance of batteries or piercing wirings has made the wireless powering of these implantable devices highly attractive. In this paper, a design of a class-E power amplifier which has inductive loading appropriate for implant application was made using 130nm Silterra CMOS process at 2.4V supply. A presentation of high-Q on-chip inductors is made as a way of improving the efficiency of the wireless power transfer (WPT) system at 37.5MHz industrial, scientific and medical (ISM) band. Wireless power transfer efficiency of 59-89% is obtained for distance variation up to 10mm of the implant coil from the transmit power coil. DC voltage of more 3V is obtained for distance up to 10mm of the implant coil; and the on-chip implant inductor measures a smaller size of 10mm×10mm making the design more suitable for the application of medical implant.
This paper presents about the development of Software-as-a-Service tool for standard cell library characterization -ASCLIC. ASCLIC was created because many standard cell characterization software that exists are not easily accessible by public. Furthermore, it requires expensive paid license otherwise standard cell library characterization must be done manually. ASCLIC available as a web service that offers same function as another standard cell characterization. Simply upload netlist, model if available and configurations and the results will be emailed back to the user. Based on the results, the highest percentage changes for process technology of 130nm are 0.00172%, 1.92737% and 0.00198% of leakage power, internal power and timing respectively. In short, ASCLIC aims to give benefits to others especially educational institution for research purposes.
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